34th

International Electronic Manufacturing Technology Conference, 2010

Investigations of the Effects of Blade Type, Dicing Tape, Blade Preparation and Process Parameters

on 55nm Node Low-K Wafer

Koh Wen Shi, Yow K.Y, Rachel Khoo

Freescale Semiconductor Malaysia Sdn. Bhd.

2, Jln. SS8/2, Free Industrial Zone Sungei Way,

47300 P.J. Selangor, Malaysia

wenshi.koh@freescale.com

Abstract

This paper presents an investigation of the effects of

blade type, dicing tape, blade preparation and the key

process parameters optimization on improving topside ILD

peeling (thicker scribe structures) and chipping for 55nm

low-k wafer. An appropriate dicing blade selection, blade

preparation / conditioning methodology and dicing tape

selection plays an important role in developing a robust saw

process. As such, experimental studies were conducted

under varying Z1 spindle rotation, Z1 cut depth into Si as

well as the blade type property variation as the input factors,

in order to improve the ILD peeling and die chipping. The

settings of machining parameters and blade types were

determined by using the design of experiment (DOE)

techniques and the critical process parameters and materials

were analyzed statistically by using the analysis of variance

(ANOVA). Dicing tape property variations (PO-base or

PVC-base) as well as the blade preparation methodology

posed some influences on the overall dicing quality, such as

die backside chipping, die removal performance, ILD

peeling and die topside chipping. SEM imaging and optical

visual inspection were conducted to validate the impacts of

the ILD peeling / chipping on post-processed low-k wafers.

A thorough quantification and categorization of ILD peeling

and chipping on heavy metallization at the saw scribe

structures were described. As part of the recommendation

for future works, a different approach in dicing technolgy,

namely laser grooving was proposed to eliminate ILD

peeling and chipping. In conclusion, the optimized dicing

recipe for 55nm node low-k wafer suggested by the DOE

model are: (1) a thinner PO-base dicing tape, (2) a dicing

blade with higher diamond concentration and finer grit size,

(3) blade preparation / conditioning done with SiC board and

(4) processing at lower spindle rotation and deeper cut depth

are much preferred. The overall dicing responses and cutting

quality has improved and is better compared to current

production recipe.

1. Introduction

A few years ago, some articles had presented some of the

issues and challenges faced by the wafer dicing process due

to the new emerging low-k / ULK wafer technology. There

is a trend observed in the semiconductor industry which

includes copper and low-k / ULK dielectric film in wafer

fabrication process for better electrical, mechanical and

thermal performance. The aluminium interconnects will be

replaced by copper and the traditional SiO2 will be replaced

by low-k / ULK dielectric materials. The conversion from

traditional oxide materials to advanced materials has

actually made significant improvements on the device

performances and reliability, the die feature can be shrunk

dow. However, the dielectric constant (k is 2.0 or below) is

fairly small for low-k / ULK dielectric film compared to

traditional oxide (k is 4.0). [1] The impact is strong when it

comes to wafer dicing. As the k-value of the dielectric film

is reduced, the mechanical property usually will deteriorate

because of the increase in porous volume introduced into the

materials.

The chemical, thermal, and mechanical behaviours of

low-k / ULK wafer are quite different from traditional

materials. Some problems are being encountered in adapting

this new wafer technology. Low-k / ULK porous wafers

tend to have ILD / metal layers peeling and chipping during

the wafer dicing process because of the brittleness and

fragility of the top layers which consist of oxides, metals and

low-k silicon. The high occurrences of critical dicing defects

could impose challenges for packaging assembly yield,

product performance, quality and reliability issue. Therefore,

a number of assessments were conducted in order to address

and improve the ILD peeling and die chipping issue. Firstly,

dicing tape selection and the effects on silicon backside

chipping, the adhesive strength of the tape to the silicon

during dicing, and the impacts of die removal after UV light

exposure. Secondly, dicing blade selection to understand the

effects of blade properties to the ILD / metal layer peeling

and die topside chipping performances. Thirdly, a study was

done on blade dressing / conditioning and the impacts on

improving ILD peeling and chipping quality. Fourthly, to

optimize the critical dicing process parameters such as

spindle rotation, cut in depth, table speed, and scribe pattern

variations for dicing defects reduction. All evaluations were

performed on 55nm low-k wafers, and expected to establish

a robust wafer dicing process with good and promising

cutting quality. In the next session, we will discuss about the

research methodology and experimentation.

2. Research Methodology and Experimentation

In this session, we will describe the methods and

experiments that were performed to understand and

investigate the effects / impacts of various dicing tapes,

cutting tools (dicing blades), blade dressing methods and

dicing process variables to the ILD peeling and die chipping

performance.

2.1 Experimental Wafer Information

The detailed technical wafer information that was chosen

in this study is shown in Table I. The selected test vehicle in

this project is a pizza mask wafer which consists of multiple

device designs on a single wafer. There is a total of 3

different die devices in each wafer, which needs to be

singulated for ILD peeling and die chipping assessments.

The test vehicle designed and fabricated with 55nm wafer

process technology, the typical cross sectional view of the

metal layer stacks is shown in Fig. 1. The wafer surface was

electroplated with thick metallization (1-3um) on top of the

aluminium bonding pads and test patterns on the saw street.

The metal compounds on the thick metallization contains a

composite of nickel, gold and palladium elements. Dicing

through the thick metal composite tends to result more ILD

peeling and chipping defects due to the hard and brittle

structure in nature. The following dicing assessments were

conducted to develop a robust saw process capability on

dicing through the complicated Cu metals, low-k dielectric

films and thick electroplating metallization.

Table I Test vehicle information

Wafer Technology CMOS 55nm low-k wafer

Die Size Small: 3mmx3mm

Medium: 6mmx7mm

Large: 10mmx7mm

Wafer Diameter 300mm

Wafer Thickness 280um

Saw Street Width 80um

Electroplating Thickness 1-3um

Fig. 1 Cross sectional view of 55nm low-k metallization

2.2 Dicing Tape Selection

Two types of UV dicing tapes were evaluated, which are

A tape and B tape type. Table II shows the comparison

matrix between the 2 dicing tapes. The variations of tape

properties (tape thickness, base film material type and

adhesive strength) could affect the die backside chipping

performance and effectiveness for die pick up process (die

removal) after UV light exposure.

Table II UV dicing tape properties and variations

Wafers are mounted on the UV dicing tapes respectively

(both A and B). The cutting tools, the saw machine and saw

process parameter applied are fixed at constant value

(nominal parameter), as illustrated in Fig. 2. The dicing

responses to-collect are die backside chipping measurement.

As part of the evaluation, the ease of die removal (after UV

light exposure) during die bonding will be assessed, it is to

verify the tape’s adhesive strength to prevent die fly-off

issue.

Fig. 2 The general process flow for wafer mounting and

dicing

2.3 Blade Dressing Condition

To successfully complete a dicing project with good

cutting quality, blade preparation / conditioning is one of the

critical factors (dicing blades, process parameters, and

dicing tapes) one needs to consider. Blade dressing is

important, for the reason, to grind off the excess bonding

material and to expose the diamond particles for cutting. The

traditional tools used to condition / season the dicing blade

are silicon wafer. However, the total completion time to

prepare a blade for wafer cutting usually takes a few hours

(very long). The new method proposed in this experiment is

the use of a dressing board, which is of a silicon carbide-

based (SiC) material. The advantage of using SiC dressing

board is that the total time required to prepare a blade for

wafer cutting is fairly short, which takes less than an hour.

Table III shows the experiment matrix conducted by using

both new and traditional blade dressing method and to

investigate its effects on the cutting quality. The SiC

dressing board was mounted on the dicing tape and a visual

inspection will be done on the dressing board after blade

dressing as shown in Fig. 3. The ILD peeling / delamination

are the main dicing response collected for statistical data

analysis and interpretation.

Table III Experiment matrix for blade preparation / dressing

using Si wafer and SiC dressing board

Fig. 3. (i) Dressing board mounted on dicing tape and (ii)

Cutting lines on the board after completion of blade dressing

Wafer mounted on UV

tape

Wafer dicing

Wafer

Wafer

Dicing tape

Top View

75mm

75mmSide View

1 mm*0.090mm

Dressing board mounted on the

dicing tape

(i) (ii)

(i)

Electroplating

Metallization

Factor + 0 -

Spindle RPM High Medium Lo

Cut depth into Si High Medium Lo

Blade Type (Categorical) Blade Type C Nil Blade Type D

2.4 Dicing Blades Selection and Dicing Process Variables

Choosing a suitable dicing blade is very important. The

key elements that one needs to consider when selecting a

new blade are diamond grit size, diamond grit concentration

and bonding material. Improper dicing blade selection as

well as non-optimized dicing process parameters eventually

will cause poor cutting quality. In order to establish a new

dicing recipe capable of processing CMOS 55nm low-k

wafer, a 3-factor full factorial DOE model was conducted in

order to optimize the topside ILD peeling and chipping

performance. Sawing quality with existing parameters were

not satisfactory and saw process parameter optimization was

needed for cutting through the unfriendly aluminium scribe

pattern (which has a newly added ~3um thick electroplating

metallization). The DOE model consists of 3 variables,

blade type, spindle rotation and cut depth into Si, see Table

IV. A comparison of the properties between blade type C

and D is shown in Table V.

Table IV 3-factor DOE matrix

Table V Blade types and properties comparison

Blade Type Blade Type C Blade Type D

Diamond

Concentration High Low

Diamond Grit Size Larger Smaller

Bonding Material Standard Soft

Blade Exposure 760-890um 640-760um

Blade Thickness 25-30um 25-30um

3. Results and Discussion

There is a total of three sub-session in this part which

will be discussed in detail for all the results collected from

the experiments. First, the effects of different dicing tapes to

the die backside chipping performance. Second, the effects

of different dressing tools to the topside ILD peeling

performance. Third, the effects of blade types and dicing

process parameters on reducing ILD peeling and die

chipping found on cutting through the unfriendly scribe

structures (higher metal density , harder and brittle

metallization impose challenges for wafer dicing).

3.1 Effects of Dicing Tape Variations

Die back and die side chipping performances: Table VI

summarized the die chipping data and performances across

the different dicing tapes (UV) used. Chipping data

calculated in mean value based on sample size, N=50. A few

observations have benn noted based on the data and the

variability chart: first, PO-based tape (harder tape) results

better chipping data compared to PVC-based tape (softer

tape). Second, thinner tape is favourable with smaller die

chipping size. Both tape B and Enhanced-tape B show good

and comparable die chipping size, even with differences in

adhesive strength after UV light exposure. Thicker tape

thickness and softer base film (tape A) tend to produce

bigger chipping size.

Table VI Chipping data (average) across dicing tape

variations

Tape Type Tape

Thickness

Base

Film

Adhesive

Strength

(after UV)

Dieback

Chip

(um)

Dieside

Chip

(um)

Die

Fly

A 110 PVC High

(Strong)

27.5 16.7 No

B 90 PO Low

(Weak)

4.8 6.0 Yes

B

(Enhanced)

90 PO High

(Strong)

10.1 9.0 No

Fig. 4. Variability chart for die side chipping

Die-pick up performances after UV light exposure: The

adhesive strength for tape B is fairly low after UV exposure

compared to tape A and enhanced-tape B. Therefore, die fly

issue is possible to happen on tape B during die bonding (see

Fig. 5). This is not acceptable although the die chipping data

is passable and looks good. This means that we need to have

sufficient adhesive strengh after UV exposure so the die will

not be so easy to fly off before die bonding, see Fig. 6 about

the description of die fly issue for tape B. Therefore, tape B

is not suitable for use due to the weak adhesive strength after

UV and can cause high yield loss due to die fly issue.

Based on the results, enhanced-tape B is more favourable

in this project because of the small die backside chipping

(10um in average) and stronger adhesive strength after UV

resulting to no die fly issue. A harder (PO-based) and

thinner tape is more preferred than a softer and thicker tape

for better die backside chipping performance.

Run

Order Blade Type Spindle RPM Cut Depth into Si

1 D Hi Lo

2 C Lo Lo

3 D Hi Hi

4 C Lo Hi

5 D Lo Hi

6 C Med Med

7 D Lo Lo

8 C Ho Lo

9 D Med Med

10 C Hi Hi

Chipping

As the needle retracts, vacuum is pulling down

the tape and adjacent die. This motion separates the adjacent dies from the tape, causing die throw.

Needle pushes tape and die up. Adjacent dies

get push up as well as since the needle is blunt with radius of 350um and does not pierce through the tape. As the pick up tip pulls the die up, the die starts to separate from the tape.

This will not happen to the A and Enhanced-B tape as the after UV exposure, the adhesive strength is still stronger

Tape B Tape B (Enhanced)

Fig. 5 Tape B observed die fly off issue due to weak

adhesive strength after UV exposure

Fig. 6 Illustration of die fly issue during die bonding due to

weak adhesive strength after UV exposure

3.2 Effects of Blade Dressing Tool Variations

Conditioned blade profile inspection: Table VII shows

the resulted blade profile (SEM mircograph) by using

different blade dressing tools, i.e. Si wafer versus SiC board.

The total time required to prepare the blade using SiC board

is shorter than standard Si wafer dressing. The tip of the

board dressed blade looks more rounder than the Si wafer

dressed blade. SEM imaging was performed to inspect the

physical characteristics of the dressed blade profile as well

as the distribution of the exposed diamond grit after

dressing. Si wafer dressed blade (current dressing approach)

resulted to the blunt shape of the exposed diamond grit after

longer hours of dressing time, the distribution / density of

the diamond grit that exposed is high. SiC board dressed

blade results sharper diamond grit and the distribution /

density of the diamond grit that exposed is small. The

desired blade profile is the one that use SiC board for

dressing, even though the observed diamond grit coverage is

actually lower. When the diamond coverage / exposure is

low (new method), it means the SiC board is more capable

than the Si wafer to grind off the excessive bonding

materials and continue to remove the old diamond grits and

regenerate more fresh diamond grit which is embedded

inside the bonding material. This is an effective dressing

method to use SiC and it can enhance the overall cutting

power, unlike the old method which with high diamond

coverage (blunt shape). The blunt and old diamond grits can

not be removed easily and it had blocked the embedded new

diamond grits to expose.

Table VII Conditioned blade profile inspection Blade

Preparation Current Method New Method

Blade Dressing

Tools Si Wafer SiC Board

Time Required A few hours Less than an hour (16x

reduction in time)

Blade Profile

(Cross Sectional

View)

Blade Profile

(SEM Imaging)

Topside ILD peeling performance: Fig. 7 shows the

dicing effect on ILD peeling response by various scribe

patterns and different blade dressing methods. Based on the

optical photos and ANOVA statistical analysis (Fig. 7 and

Fig. 8), both Si wafer dressing and SiC board dressing

results are comparable with no significant difference in ILD

peeling response. From the boxplots and variability chart,

SiC board dressing is just slightly better than Si wafer

dressing in term of the ILD peeling size (mean data), see

Fig. 8. SiC board dressing performed better than the

traditional Si wafer dressing. Therefore, SiC board dressing

is the recommended method for use due to the short blade

preparation time, is lower in cost and produces good ILD

peeling response.

Fig. 7 Optical inspection on topside ILD peeling with

respect to different blade dressing method

Fig. 8 Variability chart for ILD peeling size across different

scribe patterns. SiC board dressing results to smaller ILD

peeling size (mean data) compared to Si wafer dressing.

Before Saw SiC Board Dressing (New)Si Wafer Dressing (Current)

Scribe Pattern Type 1

Scribe Pattern Type 2

Tip: sharp

Tip: rounder

Peelin

g S

ize (

um

)

10

15

20

25

30

35

F40 D

ressed

Bla

de

Mir

ror

Wfr

Dre

ssed B

lade

F40 D

ressed

Bla

de

Mir

ror

Wfr

Dre

ssed B

lade

F40 D

ressed

Bla

de

Mir

ror

Wfr

Dre

ssed B

lade

F40 D

ressed

Bla

de

Mir

ror

Wfr

Dre

ssed B

lade

Curr

ent

CO

N/M

1 S

PM

Curr

ent

Sta

ck S

PM

Old

CO

N/

M1 S

PM

Old

Sta

ck S

PM

Blade Condition within Scribe Pattern

10

15

20

25

30

35

Peelin

gS

ize (

um

)24.0

8?.6

78665

F40 D

ressed B

lade

Mirro

r W

fr D

ressed B

lade

F40 Dressed Blade

Blade

Condition

Peeling Mode

Mild peeling range from10% -50%

Severe peeling >50%

Comments

No peeling or <10% peelingMode 1

Mode 2

Mode 3

Optical Photo

0

20

40

60

Peelin

g

Mode 3

.5

1.5

?1.2

944

0

20

40

60

80

Chip

pin

g

Mode 2

2.8

21508

?9.2

7598

00.2

50.7

51

Desirabili

ty

0.9

54474

35

40

45

50

55

35

Z1 Rotation

(kRPM)

203O

127J

203O

Blade Type

50

100

150

176.66295

Z1 Cut Depth

into Si (um)

0

0.2

5

0.5

0.7

5 1

Desirability

Lo Hi C Type

DType

Lo Hi

Die Corner Peeling

Die Corner Peeling Mode Distribution vs. Run Order

0%

20%

40%

60%

80%

100%

1 2 3 4 5 6 7 8 9 10 11

Run Order

Pe

eli

ng

Mo

de

D

istr

ibu

tio

n

Mode P1

Mode P3.0

Mode P3.5

Control

Sample size: ~240 x

11cells Mode 3.5

Peeling Mode Distribution vs. Run Order

0%

20%

40%

60%

80%

100%

RO

1

RO

2

RO

3

RO

4

RO

5

RO

6

RO

7

RO

8

RO

9

RO

10

RO

11

Run Order

OP

M S

GP

C P

ee

lin

g

Mo

de

Dis

trib

uti

on

Mode P3.5

Mode P3

Mode P2

Control

Die Side Peeling

Die Chipping Mode Distribution vs. Run Order

0%

20%

40%

60%

80%

100%

RO

1

RO

2

RO

3

RO

4

RO

5

RO

6

RO

7

RO

8

RO

9

RO

10

RO

11

Run Order

Die

Ch

ipp

ing

Mo

de

D

istr

ibu

tio

n

Mode C2

Mode C1

Mode C0

Control

RO8 is the best cell

with less mode 3.5 peeling, across all the 10 DOE run orders

RO4 is the best

cell with lesser mode 3.5 peeling

RO4 is the best cell

with lesser mode 2 die chipping

Die Chipping

Sample size: ~240 x

11cells

Sample size: ~240 x

11cells

3.3 Effects of Blade Types and Dicing Process Variables

Die corner, ILD peeling and die chipping performance:

A total of 10 runs were conducted and the input process

factors included in this experiment are dicing blade types,

Z1 spindle rotations and Z1 cut depth into Si (see Table VI).

This is part of our efforts to define an optimize saw recipe

for hard and heavy metallization (via electroplating). The

dicing responses to-collect for all the 10 runs are die corner

peeling, dieside ILD peeling and die topside chipping. Table

VIII shows the general guideline to follow for ILD peeling

charaterization. The distribution of ILD peeling and die

chipping across all the run order is shown in Fig. 9.

According to the bar chart in Fig. 9, RO4 (lower Z1 rotation,

deeper cut depth into Si and using blade type C) turns out to

be the best run in this DOE for ILD peeling and die chipping

performance.

Table VIII General guidelines for ILD peeling

characterization

Fig. 9 ILD peeling and die chipping bar chart by run orders

In order to reduce the ILD peeling and chipping size, the

overall response optimizer recommends to use blade type C,

as well as a lower spindle rotation and deeper cut depth into

Si is preferred / desirable, see Fig. 10. The desirability for

this prediction profiler is fairly reliable and good, which

reads at about 95%.

Fig. 10 ILD peeling and die chipping responses optimizer

Figure 11 shows contour plots for both peeling and

chipping responses. Based on the contour plots, the best

defined saw recipe had been shifted to a new location (i.e at

upper left corner point) from the current production recipe

(i.e. somewhere close to lower right side of the plot). Based

on all the statistical data and analysis, the optimal saw recipe

to reduce the ILD peeling and chipping suggested a lower

Z1 spindle rotation, a deeper Z1 cut depth into Si and the

dicing blade type C (higher diamond concentration, fine

diamond grit size is preferred).

Fig. 11 Contour plots for ILD peeling and die chipping

Z1 rotation

Z1 cut depth

5550454035

175

150

125

100

75

50

Blade 203O

Hold Values

>

–

–

–

–

< 10

10 20

20 30

30 40

40 50

50

3.5

mode

Peeling

Contour Plot of Peeling mode 3.5 vs Z1 cut depth, Z1 rotation

DOE Defined

(OPM Fado)

Current Recipe

(Control Fado)

Z1 rotation

Z1 cut depth

5550454035

175

150

125

100

75

50

Blade 203O

Hold Values

>

–

–

–

–

< 10

10 20

20 30

30 40

40 50

50

3.5

mode

Peeling

Contour Plot of Peeling mode 3.5 vs Z1 cut depth, Z1 rotation

DOE Defined

(OPM Fado)

Current Recipe

(Control Fado)

Z1 rotation

Z1 cut depth

5550454035

175

150

125

100

75

50

Blade 203O

Hold Values

>

–

–

–

–

–

< 10

10 20

20 30

30 40

40 50

50 60

60

mode 2

Chippimg

Contour Plot of Chippimg mode 2 vs Z1 cut depth, Z1 rotation

DOE Defined (OPM Fado)

Current Recipe

(Control Fado)

ILD Peeling Contour Plot

Die Chipping Contour Plot

Lo

Lo

Hi

Hi

Hi

Hi

Lo

Lo

34th

International Electronic Manufacturing Technology Conference, 2010

4. Future Work and Recommendations

Based on all the experimentation studies that was

performed, the results show that blade dicing process alone

is not possible to produce zero dicing defects. Dicing

through the unfriendly scribe patterns with a higher metal

density still exhibits metal layer delamination, ILD peeling

and die chipping. Hence forth, on future works and

recommendations, laser grooving could be considered as

another option in order to produce a true dicing defect-free

process.

Unlike traditional blade dicing, laser grooving is a

thermal energy based process; with no direct tool-to-work

piece contact. When a focused laser beam with high energy

density contacts the Si wafer, thermal energy is transferred

and absorbed by Si; heat will transform to the low-k ILD

metal layers and melted into molten and the solids are

vaporized, which can be disposed and removed by the flow

of air pressure. This new advanced dicing process

technology can be an opportunity to resolve the dicing

challenges with more upcoming low-k and ULK wafers.

5. Conclusions

Based on the experiments and result findings, we may

conclude that the dicing blade and its blade dressing

preparation, dicing tape selection, and dicing process

parameters plays an important role in effecting ILD peeling /

delamination, die topside chipping and die backside

chipping. For a better die backside chipping performance, a

PO-base film, thinner tape thickness, a stronger tape with

high adhesion strength are more desirable than a PVC-base

film. A proper blade preparation is required, sufficient blade

dressing / conditioning time is needed in order to grind-off

the excess bonding material and therefore able to expose

diamond grit for cutting (which has been sharpened by the

truing effect). SiC dressing board is more effective than Si

wafer dressing in terms of producing sufficient diamond

coverage being exposed for cutting. The overall cutting

quality is comparable and acceptable for both SiC board

dressing (new method) and Si wafer dressing (traditional

method). SiC board dressing is selected because of the total

time required for the blade preparation which is shorter and

faster than traditional Si wafer dressing. To optimize and

reduce ILD peeling and die chipping on unfriendly scribe

patterns (with heavy metalization), the model suggests to

utilize a dicing blade with higher diamond concentration and

a finer grit size is preferred. Therefore, to obtain good

topside cutting quality, therefore the wafer needs to be

processed at a lower spindle rotation and a deeper cut depth

into Si.

Acknowledgments

The authors would like to thank Freescale

Semiconductor (M) Sdn. Bhd. for their support in this 55nm

low-k wafer dicing process development project. Also my

sincere thanks to all technical and analysis support from

TSO-PAE members in KLM.

References

1. Wang ZhiJie, Wang, S., Wang, J.H., Lee, S., Yao Su

Ying, Han, R., Su, Y.Q., “300mm Low-k Wafer Dicing

Saw Study”, Electronic Packaging Technology, Sept.

2005, pp. 262-268.