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DESIGN OF WIDEBAND LOW NOISE AMPLIFIER YONG KOK SHENG This Report is Submitted in Partial Fulfillment of Requirement For The Bachelor Degree of Electronic Engineering (Telecommunications Electronics) Faculty of Electronic and Computer Engineering Universiti Teknikal Malaysia Melaka June 2012

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Page 1: DESIGN OF WIDEBAND LOW NOISE AMPLIFIER YONG …eprints.utem.edu.my/9407/1/Design_Of_Wideband_Low_Noise_Amplifi… · dan < -10 dB, penguatan > 15 dB dengan pengasingan

DESIGN OF WIDEBAND LOW NOISE AMPLIFIER

YONG KOK SHENG

This Report is Submitted in Partial Fulfillment of Requirement For The

Bachelor Degree of Electronic Engineering (Telecommunications Electronics)

Faculty of Electronic and Computer Engineering

Universiti Teknikal Malaysia Melaka

June 2012

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DESIGN OF WIDEBAND LOW NOISE AMPLIFIER

YONG KOK SHENG

UNIVERSTI TEKNIKAL MALAYSIA MELAKA

FAKULTI KEJURUTERAAN ELEKTRONIK DAN KEJURUTERAAN KOMPUTER

BORANG PENGESAHAN STATUS LAPORAN

PROJEK SARJANA MUDA II

Tajuk Projek : ……………………………………………………………………………

Sesi Pengajian

: 1 1 / 1 2

Saya ………………………………………………………………………………………………….. (HURUF BESAR) mengaku membenarkan Laporan Projek Sarjana Muda ini disimpan di Perpustakaan dengan syarat-syarat kegunaan seperti berikut:

1. Laporan adalah hakmilik Universiti Teknikal Malaysia Melaka.

2. Perpustakaan dibenarkan membuat salinan untuk tujuan pengajian sahaja.

3. Perpustakaan dibenarkan membuat salinan laporan ini sebagai bahan pertukaran antara institusi

pengajian tinggi.

4. Sila tandakan ( √ ) :

SULIT*

*(Mengandungi maklumat yang berdarjah keselamatan atau kepentingan Malaysia seperti yang termaktub di dalam AKTA RAHSIA RASMI 1972)

TERHAD**

**(Mengandungi maklumat terhad yang telah ditentukan oleh organisasi/badan di mana penyelidikan dijalankan)

TIDAK TERHAD

Disahkan oleh:

__________________________ ___________________________________

(TANDATANGAN PENULIS) (COP DAN TANDATANGAN PENYELIA)

Tarikh: …………………………..

Tarikh: ………………………..

AMPLIFIER

15 JUNE 2012

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YONG KOK SHENG

11 JUNE 2012

“I hereby declare that this project report is of my own work except for the summary

and passage whereby for each which I have clearly stated its source.”

Signature : ……………………………………………….

Author’s name : ……………………………………………….

Date : ……………………………………………….

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AZAHARI BIN SALLEH

15 JUNE 2012

“I hereby declare that I have read this thesis and in my opinion this project report is

sufficient in term of scope and quality for the award of degree of Bachelor’s

Degree of Electronic Engineering (Telecommunication)”

Signature : ……………………………………………….

Supervisor’s name : ……………………………………………….

Date : ……………………………………………….

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This project is dedicated to my mum and dad

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ACKNOWLEDGMENTS

I am highly appreciative of the effort of my supervisor Mr. Azahari for taking

time to read through this report and his positive criticism of the project. Mr. Azahari

has given me a lot of idea on the project. . He also helps me to carry out and solves

the technical problems that I encountered especially helps me to troubleshoot the

circuit in ADS simulation.

Next, I would like to thank my co.supervisor, Mr. Daneshkumar, who is

always helpful and patient when guiding me. He has given me a lot of ideas and

suggestions in order to design an LNA having such an excellent performance.

Especially in ADS software, Mr. Daneshkumar taught me a lot on the basic of using

ADS in the S-parameter simulation. I feel lucky and grateful upon his guidance and

kindness in helping me in my project. Therefore, I would like to thank him sincerely

and appreciate all the hard work by Mr. Daneshkumar.

Finally, special thanks to my family that provided me with full financial

support whenever I need it. They also motivated me from time to time that played an

important role as to ensure that I am on the right track in finishing the project.

Once again, I hereby want to take this opportunity to thank all of you for your

concern and support throughout this project. Thank you!

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ABSTRACT

Today, wideband amplifier design remains one of the most challenging

portions in the communication system. The conventional low noise amplifier

operates on a single band, in which it is easier to design the amplifier to meet the

entire specified goal. However, MOTOROLA wideband low noise amplifier which

operate from 100 MHz to 1 GHz, making it harder to design as to operate at wider

spectrum while maintaining low noise < 1.5 dB, great input and output return loss <-

10dB, good gain > 15 dB with reverse isolation of < -20 dB with restriction of low

power consumption < 1.8 V and < 10 mA, thus presenting a tougher challenge for

the designer to achieve the goals for the extended frequency range. Traditional

methods of tuning and tweaking will require more tedious and time consuming effort

to cover the wider frequency range, thus rendering the methods to be impractical.

Therefore, a more specific technical approach must be utilized to help the designers

to better design the broadband amplifier. This research paper represents the amplifier

requirements in wideband application and proposed a structured practical design

approach which utilizes the feedback topology by using Advanced Design System

(ADS) simulations in optimizing the amplifier to meet all the required specs. The

best performance design is fabricated on a FR4 strip board and the performance of

designed amplifier was verified using network analyzer. The fabricated LNA exhibits

a signal gain of more than 17 dB, NF of less than 1 dB, IIP3 of more than 10 dBm

and has been maintained unconditional stable throughout the frequency of interest.

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ABSTRAK

Masa kini, rekaan penguat hinggar rendah kekal satu bahagian yang paling

mencabar dalam bidang telekomunikasi. Penguat hinggar rendah konvensional

beroperasi dalam satu jalur sempit sahaja, di mana ia lebih mudah untuk direka untuk

mencapai semua gol yang ditentukan. Walau bagaimanapun, penguat hinggar rendah

jalur lebar Motorola yang beroperasi dari 100 MHz hingga 1 GHz, membuatnya

lebih sukar dalam mereka proses kerana ia perlu beroperasi pada spectrum yang lebih

luas pada masa yang sama ia perlu mengekalkan hinggar yang rendah < 1.5 dB,

dan < -10 dB, penguatan > 15 dB dengan pengasingan < -20 dB dengan sekatan

penggunaan kuasa yang rendah < 1.8 V and < 10 mA. Kaedah tradisional penalaan

akan memerlukan banyak usaha dan memakan masa untuk meliputi julat frekuensi

yang lebih luas, maka menyebabkan kaedah tradisional untuk menjadi tidak praktikal.

Oleh itu, pendekatan teknikal yang lebih khusus mesti digunakan untuk membantu

pereka untuk mereka penguat hinggar rendah jalur lebar yang baik. Kertas kajian ini

menbentangkan keperluan dalam perekaan penguat hinggar rendah jalur lebar dan

mencadangkan pendekatan perekaan praktikal dengan menggunakan topologi

penguat suap balik dengan menggunakan Advance Design System (ADS) simulasi

dalam mengoptimumkan penguat untuk memenuhi semua spesifikasi yang

ditentukan. Rekaan yang memberi prestasi terbaik akan difabrikasikan

menggunakan papan FR4 dan ukuran praktikal reka bentuk diuji dengan

menggunakan penganalisa vektor rangkaian untuk mengesahkan prestasi LNA. LNA

yang difabrikasikan mempamer penguatan lebih daripada 17 dB, hinggar kurang

daripada 1 dB, IIP3 lebih daripada 10 dBm dan kekal stabil sepanjang frekuensi

operasi.

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TABLE OF CONTENTS

CHAPTER TITLE PAGE

RROJECT TITLE

CONFIRMATION REPORT STATUS ii

DECLARATION iii

SUPERVISOR CONFIRMATION iv

DEDICATION v

ACKNOWLEDGEMENT vi

ABSTRACT vii

ABSTRAK viii

TABLE OF CONTENTS ix

LIST OF TABLES xii

LIST OF FIGURES xiii

LIST OF ABBREVIATIONS xv

LIST OF APPENDICES xvi

I INTRODUCTION 1

1.1 Project Background 1

1.2 Problem Statement 3

1.3 Objective 3

1.4 Scope of work 4

1.5 Thesis Outline 4

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II LITERATURE REVIEW 6

2.1 Introduction 6

2.2 Design Consideration 7

2.3 Transistor Biasing 9

2.4 Noise Figure 11

2.5 Two Port Power Gain 13

2.5.1 Operating Power Gain 14

2.5.2 Transducer Power Gain 14

2.5.3 Available Power Gain 15

2.6. S-Parameter 15

2.7 Stability 17

2.8 Stabilization Techniques 18

2.9 Linearity 19

2.9.1 Input 1dB Gain Compression 19

2.9.2 Intermodulation distortion (IP3) 20

2.10 Condition of matching 21

2.11 LNA Architecture 22

2.11.1 RLC Feedback 22

2.11.2 Inductive Feedback 23

2.12 Related Work 23

III PROJECT METHODOLOGY 25

3.1 Introduction 25

3.2 Project Flow 26

3.3 Design specification 28

3.4 Transistor selection 28

3.5 Stability checking 29

3.6 DC biasing 30

3.7 Matching Network 32

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IV RESULTS AND ANALYSIS 34

4.0 Introduction 34

4.1 Stability Analysis 34

4.2 DC Biasing 38

4.3 Two Port Power Gain 40

4.4 Matching Network 43

4.5 Noise Figure 48

4.6 Feedback LNA Design 49

4.7 PCB Layout 51

4.8 Measurement Results versus

Simulation Results 54

4.8.1 Return Loss, S11 54

4.8.2 Gain, S21 55

4.8.3 Output Return Loss, S22 55

4.8.4 Reverse Isolation, S12 56

4.8.5 Noise Figure 56

4.8.6 Input Third Order Inception Point, IIP3 57

IV CONCLUSION AND FUTURE WORKS 58

5.1 Conclusion 58

5.2 Future Works 59

REFERENCES 60

APPENDICES 62-71

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LIST OF TABLES

NO TITLE PAGE

1.1 Wideband LNA design specification 2

2.1 Types of biasing network and formula 9

2.2 Comparison of the reported LNA with other LNA design 24

3.1 Wideband LNA design specification 28

3.2 Comparison between FET and BJT transistor 29

4.1 Calculated K-factor (before stabilize) 35

4.2 K-factor swept across operating frequency 36

4.3 K factor swept across operating frequency after stabilization 37

4.4 And for different frequency 43

4.5 Comparison between the calculation and simulation results 48

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LIST OF FIGURES

NO TITLE PAGE

1.1 Block diagram of the superheterodyne receiver 1

2.1 Block Diagram of basic LNA 7

2.2 Illustration of signal to noise in a system 11

2.3 Noise in cascaded stage 13

2.4 Input and output circuit for 2-port network 13

2.5 Two-port network showing incident waves and reflected waves 15

2.6 Stability Circles 17

2.7 Instability region for S11<1 and S11>1 18

2.8 Definition of 1dB compression point for a nonlinear amplifier 19

2.9 IIP3 Concept 20

2.10 IIP3 Measurement in Network Analyzer 21

2.11 Basic Diagram of Matching Network 21

2.12 Feedback Circuit for Stability Increment 22

3.1 LNA design flow 26

3.2 ADS setup to find the best biasing point 31

3.3 Series inductor moves clockwise (left) and series capacitor moves 33

counter-clockwise (right) along circles of constant resistance

3.4 Shunt inductor moves counter-clockwise (left) and shunt capacitor 33

moves clockwise (right) along circles of constant conductance

4.1 Stability checking of BFP640 using ADS 35

4.2 Stabilization of transistor using RC feedback and output resistive load 36

4.3 BFP 640 Characteristic Curves 38

4.4 Minimum Noise Figure across all biasing point 39

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4.5 Gain across all biasing point 39

4.6 Biasing Network along with DC block and RF chock 40

4.7 Two port power gain of BFP640 42

4.8 Smith Chart for input matching 44

4.9 Input Matching Network 44

4.10 Smith Chart For Output Matching 45

4.11 Output Matching Network 46

4.12 LNA Design with Matching Network 46

4.13 Comparison between before and after optimization for (a) , 47

(b) , (c) , (d) , (e) noise figure and (f) stability factor

4.14 Noise figure and noise figure minimum 48

4.15 Schematic design for feedback LNA 49

4.16 Input and Output return loss for schematic design 50

4.17 Forward gain and reverse isolation for schematic design 50

4.18 Noise figure and stability factor for schematic design 50

4.19 Schematic with transmission line 52

4.20 Layout for LNA design 53

4.21 LNA Prototype 53

4.22 Comparison between Simulation and Measurement for 54

Return Loss, S11

4.23 Comparison between Simulation and Measurement for Gain, S21 55

4.24 Comparison between Simulation and Measurement for 55

Output Return Loss, S22

4.25 Comparison between Simulation and Measurement for 56

Reverse Isolation, S12

4.26 Comparison between Simulation and Measurement for noise figure 56

4.27 Comparison between Simulation and Measurement for 57

Input third order inception, IIP3

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LIST OF ABBREVIATIONS

LNA - Low Noise Amplifier

RF - Radio Frequency

IF - Intermediate Frequency

BJT - Bipolar Junction Transistor

E-PHEMT - Enhancement Mode Pseudomorphic HEMT

PHEMT - Pseudomorphic HEMT

WLAN - Wireless Local Area Network

DC - Direct current

VSWR - Voltage Standing Wave Ratio

ADS - Advanced Design System

FET - Field-Effect Transistor

Si - Silicon

GaAs FET - Gallium arsenide Field-Effect Transistor

CMOS - Complementary Metal–Oxide–Semiconductor

MMIC - Monolithic Microwave Integrated Circuit

MESFET - Mmetal Semiconductor Field Effect Transistor

HEMT - High Electron Mobility Transistor

SNR - Signal Noise Ratio

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LIST OF APPENDICES

NO TITLE PAGE

A Data Sheet Infineon BFP640 60

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CHAPTER 1

INTRODUCTION

1.1 Project Background

The receiver can be divided into Front-End and Back-End. The front-end

converts RF (radio frequency) to IF (intermediate frequency). The back-end converts

IF to baseband. For digital radios, the back-end will also provide analog to digital

conversion. This allows the microprocessor to perform digital signal processing on

the received signal and convert it to useful information.

The LNA is a key component in the front-end of receiver section. The main

function of LNA is to amplify possibly very weak signal without picking up

excessive noise, which will enhance the receiver signal-to-noise ratio (SNR).

Figure 1.1: Block diagram of the superheterodyne receiver

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Another important attributes of the LNA includes low noise figure,

reasonable gain and stability over the designated frequency band without oscillating

while operating at very low power levels. For large signal, the LNA amplifies the

signal without introducing any distortions. Hence, the sensitivity of the receiver is

highly dependent on the LNA as it defines the smallest signal that a receiver can

detect. [9]

In this project, a high performance wideband low noise amplifier which

operates from 100 MHz to 1 GHz is presented. This wideband requirement means

that it will be harder for the designer to build the individual receiver section. The

receiver subsection needs to be able to receive signals from every critical band across

radio frequency while allowing the user to selectively choose the desired frequency

band and convert it to baseband. To achieve that, the LNA needs to provide a

constant gain, low noise high linearity and unconditionally stable to ensure the whole

receiver chain to meet the standard specification. The technical requirements of the

wideband LNA design is shown in Table 1.1 below.

Table 1.1: Wideband LNA Design Specification

Parameter Specs

Operating Frequency (MHz) 100 – 1000

Noise figure (dB) < 1.5

Gain (dB) > 15

Input Third Order Inception, IIP3 (dBm) > 5

Stability Factor (K) > 1

Current (mA) < 10

Voltage (V) < 1.8

Input and Output Return Loss (dB) < -10

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1.2 Problem Statement

Portable two ways radio size has been shrinking over time, the employ of

multiband radios which consist of several narrow band discrete circuits are larger

because inside of housing must contain two or three separate transceivers. Besides,

driving a slightly larger housing is the additional filtering and shielding between the

transceivers in order to avoid the interfering effect between different transceivers.[1]

To solve this problem, the combination of several narrow bands LNA circuit into

single wideband LNA circuit is proposed. Wideband LNA design presents a

considerable challenge, as we know conjugate matching will give maximum gain

only over relatively narrow bandwidth, while designing for less max gain will

improve the gain bandwidth, but the input and output part of the amplifier will be

poorly matched.[2] For these reason feedback technique is proposed to

simultaneously achieve improvement in bandwidth and also on its gain, noise figure

and return loss. The conventional LNA suffer from the problem that the input

matching network can be tuned for low noise figure or low VSWR (conjugate match)

but not both parameter simultaneously.[3] The negative feedback technique can be

used in wideband amplifier to provide a flat gain response and to reduce the input

and output VSWR. It also controls the amplifier performance due to variations in the

S parameters from transistor to transistor and furthermore, in-band stability is also

improved by employing negative feedback. [4]

1.3 Objective

The objective of this project is to design low noise amplifiers for

MOTOROLA application by using feedback and cascaded technique, then analysed

on their noise figure, matching and gain at the operating frequency. Finally the best

performance low noise amplifier will be fabricated as final result.

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1.4 Scope of work

Scope of this project can be divided into four parts which are:

a) Literature review

Include the study of the characteristics of the LNA especially on the gain,

noise figure, stability which must be taken into consideration in LNA design.

b) Design and simulation

LNA which operated at frequency band start from 100 MHz to 1 GHz is

designed and simulated using Advanced Design System (ADS) and

optimization will be performed to get the best result.

c) Fabrication

The fabrication of the low noise amplifier will be done using microstrip FR4

will be used to fabricate the low noise amplifier.

d) Test analysis and measurement

The performance of the designated amplifier circuit is measured using the

vector network analyzer and will be compared with the simulation result.

1.5 Thesis Outline

The thesis is separate into five chapters. Chapter 1 is the brief introduction of

the project where the problem statement, objective and scope of works are mentioned

clearly in this chapter.

Chapter 2 is the Literature review where the basic of RF Fundamental,

Introduction of LNA and LNA architecture are explained.

Chapter 3 involve the LNA design process include the transistor selection,

stability checking, DC biasing, matching networks, simulation and layout design.

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In chapter 4, this chapter will analysis the simulation results and fabrication

process and lastly testing important parameter of the circuit.

Finally in chapter 5, the conclusion and future work will summarizes the result

of the LNA designed. It also conclude the type of LNA that gives the best performance

and most suitable to be used in Motorola product’s application.

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CHAPTER II

LITERATURE REVIEW

2.1 Introduction

Recently, the growing demand in high performance wireless technology had

boosted the development of LNA. The low noise amplifier is key block in any

receiving system due to the receiver sensitivity is generally determined by its gain

and noise figure. Besides, the noise figure for the follow amplifier stages in receiver

system are reduced by providing a LNA with low noise figure and high gain, thus it

is vital for LNA to amplify the received signal without introducing internal noise.

Most of the LNA are designed using BJT, GaAs FET, CMOS, PHMET and

MESFET type of transistors. These are widely used in RF communication

applications such as wireless communication, radar communication and also mobile

communication. A low voltage, low power consumption, ability to operate at a wide

range of temperatures and better performance are always being an advantage for a

good LNA design for RF applications.

A lot of research is done before going through the project. This is definitely

very important since some basic knowledge must be known before starting a project.

Internet sources and books on RF were used to search for information on LNA

design. Apart from good understanding on RF theory, knowledge on the wideband

LNA methodology is also needed in order to design a broadband LNA

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Basically, the research is done on the steps for a good design and what are the

trade-offs involved. Datasheets for transistors are also reviewed from various sources

to understand the characteristics of a good transistor. The S-parameter characteristic

and the biasing information given by the manufacturer in the form of s2p file for

various transistors are collected and simulated by using the Advance Design System

(ADS). This will give a better understanding on the performance of the transistor for

a certain operating frequency.

A BJT is a good choice for the LNA designers, because it gives higher gain

with acceptable low noise figure, even though a GaAs FET gives extremely low

noise compared to BJT. The problems with GaAs FET are that the designers will

face significantly stability problem. This is because FET will oscillate at frequencies

where bypassing and grounding becomes a challenge of its own. Hence, the trade-off

involve between the choosing of both type of transistor must give prior consideration.

2.2 Design Consideration

The most important design considerations in a low noise amplifier design are

stability, noise, power gain, bandwidth and DC requirements. As show in Figure 2.1,

a LNA must have DC biasing circuit to biasing the selected transistor, input and

output matching network for maximum power transfer in the circuit.

Figure 2.1 Block Diagram of basic LNA

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LNA operate in class A mode, characterized by a bias point that is about at

the center of maximum voltage and current of the bias supply for the transistor. By

referring to data sheet, the biasing point for the LNA should have high gain, low

noise figure, linear, good input and output matching and unconditionally stable at the

lowest current drain from the supply. In this project, the current drain and voltage

supply for the design are restricted to maximum of 10mA and 1.8V respectively.

Unconditional stability of the circuit is another important parameter in

designing of LNA, this characteristic means that the device does not oscillate over

a range of frequencies with any combination of source and load impedance.

The next step would be the input and output matching. For input matching,

two main criteria can be match for, either match for best noise match or great Input

Return Loss (IRL) where IRL defines how well the circuit is matched to 50 Ω of the

source. A typical approach in designing a LNA is to develop a input matching

network terminates the transistor with conjugate of Gamma optimum (Γopt), which

imply the matching the impedance of the transistor for the greatest noise match. In

most cases, this means that the input return loss (IRL) of the Low Noise Amplifier

will be sacrificed. The optimal IRL only can be achieved when the input-matching

circuit terminates the device with a conjugate of S11, which is different from the

conjugate of Γopt. Hence, there must always be a trade-off between both criteria. For

output matching, conjugate matching has been exclusively used to maximize the gain

of the circuit.

S11 and S22 are measures of the input and the output match. A value of -10 dB

means matching to within 20 %. Therefore the target value for S11 and S22 is set to be

below -10 dB over the entire bandwidth.

For the Third-Order-Intercept-Point (IIP3 and OIP3) and the gain is

controlled by some external factors such as the linearizing inductor, and bypassing

component which also play a significant role in the performance of the LNA itself.