ICSE2004 Proc. 2004, Kuala Lumpur, Malaysia

Characterization of Tunneling Current and BreakdownVoltage of Advanced CMOS Gate Oxide

Yong Yoong Hooi*, Associate Professor Dr. Iskandar Idris Yaacob*, Dr.Suhana Mohd Said*,Richard Alan Keating, Member IEEE

*Department Materials Engineering, University of Malaya, 50603 Kuala Lumpur, MalaysiaSilterra Malaysia Sdn. Bhd., 09000 Kulim, Kedah, Malaysia.

Tel : 604 - 4015714, Email : yoonghooi yongasilterra.com

Abstract Scaling down of the CMOStechnology requires ultra thin oxide tomeet the scaling of gate length. Gate oxidereliability becomes important as the gateoxide thickness is reduced [1]. Tunnelingcurrent that flow through the thin oxidewill cause an increase of the off-statecurrent leakage and unnecessary powerdissipation. In this study, probing isperformed either directly on the silicidedpoly top-plate or on the Al interconnecttop plate MOS capacitor. Probing directlyon the silicided poly top plate capacitorshows poorer contact between theTungsten probe needles and the silicide.We found that the optimal probe needlepressure had to be used to obtainconsistent result. This paper studies thetunneling current mechanisms throughthe oxide and also the soft breakdown andhard breakdown of the oxide. Ourbaseline flow now utilizes probing directlyon silicide which has greatly improved thecosts and cycle time of this testing.

I. INTRODUCTION

CMOS technologies are improving to meetthe scaling of CMOS devices. Today, manyCMOS device use the 0.1 8um channellength with the -30A oxide thickness. Ashorter channel length provides a fasterdevice speed. However, the shorter channellength, which will also cause an increase inthe leakage current. Due to short channeleffects devices with thinner oxide have asmaller channel depletion layer and hence

improved short channel characteristics [2].Therefore, decreasing the oxide thicknessproportional to the channel length isnecessary in scaling of the MOS channellength [3]. With miniaturization of MOSdevice, concernr on the reliability of the gateoxide is increasing because of the increasednumber of transistors within a die and thehigher electric field across the gate oxide.The quality of the gate oxide must becarefully monitored.

Silicided polytop plate

(a)

(b)Fig.1 (a) Silicided poly top plate capacitor.(b) Al interconnect top plate capacitor.

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In this paper, a MOS capacitor is used as atest structure for characterizing thereliability of gate oxide film with respect tooxide breakdown and electron degradation.Electrical testing or probing is done on twodifferent structures. They are Silicided (CoSi)top plated MOS capacitor and Alinterconnect top plated MOS capacitor.

The second type of tunneling current isdirect tunneling current. In direct tunneling,electrons tunnel through the trapezoidenergy barrier as shown in Figure 3.Electrons can tunnel directly through theforbidden-energy-gap of the oxide layerinstead of tunneling into the conduction-band of the SiO2 layer [4].

lI.GATE TUNNELING CURRENT

It is always desirable to obtain a zerocurrent when a device is in the off state.However in real MOS transistor orcapacitor, there is still some gate anddrain current flow when the transistor isturned off. This is the gate tunnelingcurrent, 1g.The component through the gate oxide

is normally due to gate tunneling currentIg. This phenomenon is more severe whenthe gate oxide is thin. The energy barrierthat an electron must overcome in order tocross the oxide is 3.1 eV. Electrons withenergy less than this barrier cannot gothrough the oxide classically, but they cantunnel through the oxide quantummechanically. Because of the differences inheight of barriers for electrons and holes,and because holes have a much lowertunneling probability in oxide than electrons,the tunneling leakage of electrons throughthe oxide needs more concern than tunnelingof holes through the oxide.There are two types of tunneling current,Fowler-Nordheim (F-N) tunneling I,nelectrons are injected by tunneling into theconduction band of the oxide through thetriangular energy barrier (Fig 2). Once theelectron is injected into the oxide conductionband, electron is accelerated by the oxidefield towards the gate, and eventually causesthe gate leakage current.F-N tunneling is predominant at higher

voltages. As higher voltages are applied, theeffective barrier width is reduced, and so theelectrons can easily tunnel through thetriangular barrier.

Fig.2 Energy band diagram for thephenomenon of Fowler-Tunneling inMOS capacitor

Fig. 3 Energy band diagram for thephenomenon of Direct-Tunneling ofelectron through the gate oxide.

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III. OXIDE BREAKDOWN

Gate oxide breakdown will eventuallybring a catastrophic failure of the device. Itis always desirable to have a strongdielectric strength gate oxide. Strong gateoxide will only shows failure or breakdownwhen they are stressed at higher electricfield (>8MV/cm). Breakdown is defined asthe time when there is a conduction pathfrom the anode to the cathode through thegate oxide. As the voltage across the oxideincreases, the electron current flowingthrough the oxide increases due to Direct orFowler-Nordheim tunneling. Electron-holepair (EHP) will be generated by electronsthat are tunneling through the oxide. Theseelectrons will have gained sufficient energyto create the EHP. Mobility of holes in SiO2is very low as compared to the electrons.Thus trapped holes in the oxide will causesignificant damage to the oxide. If enough ofthese traps are created, a conductive path oftraps between the gate and substrate can beformed. This will finally lead to breakdownof the oxide (percolation model). This typeof breakdown is called soft breakdown(SBD) [5]. Hard breakdown of oxide occurswhen a silicon filament is formed betweenthe substrate and the poly gate. Whensufficient heat is generated by the leakagecurrent, the silicon can melt in a smallregion and cause melting.Gate oxide breakdown can also be caused bythe presence of the defects. For example,Na+ contamination can greatly accelerate thebreakdown process [6]-[7]. Also, crystallinedefects in the silicon substrate such asstacking faults can reduce the breakdown ofthe oxide [8].

During testing, gate oxide breakdown iscategorized into 3 modes, A, B and C. A-mode occurs when the oxide fails whenstressed at electric field < 1MV/cm. It isbelieve that this oxide is already shortedbefore the application of the low strengthfield. In B-mode failure, breakdown of oxideoccurs when the oxide is stressed at electricfield 2-6MV/cm. The oxides of B-mode

group are normally contains weak spots.Oxides that fail in mode B may give rise toearly failures of ICs under normal operatingcondition although they do not produceinstant shorting. C-mode group oxides canwithstand extremely high electric fields (8-12MV/cm). The failure mechanismexhibited by this group is referred to as'intrinsic' failure [4].

In this study, breakdown voltage of thegate oxide can be obtained directly from theJg-Vg plot. Breakdown voltage of gateoxide is defined as the voltage where thecurrent of the gate is luA. From this, theelectric field is calculated. The failure canthen be categorized as mode A, B or C.

IV EXPERIMENTAL RESULTS ANDDISCUSSIONS

The MOS capacitors being tested have gateoxide thickness of -29A. The gate area is0.01cm2. The substrate material is n-dopedSi. The gate oxide was grown in 02 in 8500Cfollowed by N2 anneal. Bench tests werecarried out on two different capacitors;silicided poly and Al interconnect top plate(Fig.1). Silicided poly top plate MOScapacitors have the advantage of requiringfewer masking layers; shorter cycle time anda faster feedback than the Al interconnecttop plate capacitor.

Both of the structures were tested withthe voltage ramp test at roomtemperature. Ramped voltage stress isused to measure the breakdown voltage(Vbd) and current-voltage flow throughthe oxide. A continuously increasingvoltage is applied to the gate untilbreakdown is detected, while thesubstrate was grounded. The gate tunnelcurrent density Jg ( Jg = Ig/Area ofcapacitor) is measured and showed infigures below. Figure 4 shows thatprobing on Al interconnect results in similarand stable results.

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1.00E+02 However, it is found that with propertechniques and optimal probe needle

1.00E+00 pressure had to be used to obtain consistent

1.00E-02 result (Figure 6).

1.OOE-04

0 1.00E-06Direct tunneling

1.OOE-08 , _1.OOEO0X

1.00E-12 41i.00EO ErN Tunneling

Vg(V) 1 5 |x Al interconnect

1OO0E-09 l iiie1~~~~~~~~~~~~~~....O

Fig.4 Jg-Vg curves for probing directly on the Al 1.00&11interconnect MOS capacitors. 0 2 4 Vg(V) 6 8 10

Fig.6 Jg-Vg curves for both the silicided poly

Typical tunneling current top-plate and Al interconnect capacitors.

1.E*02 with minimal contact Figure 6 shows the Jg vs Vg. Probingdirectly on top of silicided poly top-plateand Al interconnect capacitors give similar

1.E-02 results. A proper and consistent reading forsilicided poly top plate capacitors can be

N 1.E-04 obtained when optimal pressure is applied toEa 1.E-06 / w give a better contact between the tungstenim / 8Nneedles and the silicide. For voltages from 0

1.E08 l l f Variations of current due to to 2V, direct tunneling occurs. Beyond 2Vunstable con act. till breakdown is FN tunneling.

O t 2 3 4 5 6 7 8 9 10 11 Q

VaNoisy, unstable current at lowvoltages due to poor contact.

Fig.5 Jg-Vg curves for probing directly on thesilicided poly top plate MOS capacitors.

Probing directly on the silicided poly topplate capacitors is more sensitive thanprobing on Al interconnect top platecapacitors. It can be seen from Figure 5 thatmeasurements obtained from the probing arenot consistent. This may due to poor contactbetween the tungsten probe needles and thesilicide. Also, the trend of the curves is notthe same because of the poor contact.

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V. BREAKDOWN VOLTAGE- DISTRIBUTION

Cm&d" bablfty

90%

50% i i i33%

10r o defecti10 06 2 -

00.4 0.8 1.2 1.6 2 2.4

Fig.7 Cumulative probabilitypoly top plate capacitor.

CMubMb

plot of silicided

90%

67%

50%

33%

10%, Defect tail detected

0 05 1 1.5 2 25

breakdown voltages. In our study, both ofthe structures show similar distribution ofbreakdown voltages. Although there is asmall tail of the distribution, but as long asthe low breakdown tail is small, the oxidequality is considered good.

VI CONCLUSIONS

Probing directly on the silicided poly topplate MOS capacitor shows similar resultswith conventional probing on the Alinterconnect top plate capacitor provided theoptimal pressure is being stressed on thestructure for a better and stable contactbetween the probing needles and the silicide.Results show that, oxide breakdowncharacterization for both the structure showssimilar and consistence result. Therefore,our baseline flow now utilizes probingdirectly on silicide which has greatlyimproved the costs and cycle time of thistesting.Gate current across these 29 A oxide is

mainly due to Direct and FN tunneling.Defects can cause higher leakage and thuslower breakdown voltages which show up asa tail in the breakdown distribution. Fabsmust be therefore closely monitor thisbreakdown voltage distribution to assure theon going quality of the gate oxide.

ACKNOWLEDGEMENT

Fig.8 Cumulative probability plot of Alinterconnect top plate capacitor.

Figure 7 and 8 show the cumulative plotsof breakdown voltage for both the silicidedpoly top plate and Al interconnect top plateMOS capacitor. The breakdown voltage(Vbd) in this study is defined as the voltageacross the oxide when the current is I uA.Most of the industry looks at the

distribution of the breakdown voltages. Thesample data is collected on many sites of thewafer. Typical results show breakdownvoltages of 2.3V to 2.4V. The small tail ofthe distribution shows devices with lowerbreakdown voltage than the typical

The authors would like to thank Silterramanagement for the support in making thisproject a success, and to Associate ProfessorDr. Iskandar Idris Yaacob, Dr.Suhana MohdSaid from University of Malaya for theirvaluable advice.

REFERENCES

[1] International Technology Roadmap forSemicondutor (ITRS), 2003.International SEMATECH.

[2] MOS scaling: Transistor challenges forthe 21St century. Scott Thompson,Portland technology development,

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,.

.2

-:i

.2D1DI

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197

intel corp. Paul Packan, technologycomputer aided design, Mark Bohr,Portland technology development, intelCorp.

[3] Jackson, J. C., Robinson, T., Oralkan,0., Dumin, D.J. and Brown, G. A.,"Differentiations between electricbreakdown and dielectric breakdownin thin silicon oxides" Spring Meetingof the Electrochemical Society,Proceedings of the Oxide and nitrideSymposium, Montreal, May, 1997.

[4] Stanley Wolf Ph.D, Silicon ProcessingForThe VLSI ERA, Volume 4: DeepSubmicron Process Technology, LatticePress, California, 2003, ch. 3.

[5] H.C. Lin. D.Y.Lee, C.Y.Lee, T.S.Chin,T.Y.Hung, and T.Wang, New insightinto breakdowns mode and theirevolution in ultra thin gate oxide.International Symposium on VLSITechnolgy. Pgs 37-40, 2000.

[6] T.H. D'Selano, " Dielectric breakdownindeed by sodium in MOS structures,"J.Appl. Phys., vol 44, pg. 527, Jan.1973.

[7] C.M.Osburn and D.W. Omond," Sodium-induced barrier-heightlowering in dielectric breakdown onSi02 films on silicon," J.Electronichem Soc, vol 121, no.9, pg1195, Sept 1974.

[8] P.S.D.Lin, R.B. Marcus, and T.T. Sheng" Leakage a breakdown and breakdownin ultra thin oxide capacitors-correlation with decorative stackingfaults," J. Electrochem. Soc., vol 130,no.9, p. 1878, Sept 1983.

[9] R. Degraeve, Oxide Reliability, 1997 IEEEInternational Reliability PhysicsSymposium,Tutorial Notes, Topic 7,pp.7.1-7.71.

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