ICSE2004 Proc. 2004, Kuala Lumpur, Malaysia

Design Characterization of a 1.2V 900MHz CMOS CurrentMode Down-Conversion Mixer With Filter

Pui Woon Sang, Norlaili Mohd. Noh, Tun Zainal Azni Zulkifli, Zulfiqar Ali Abdul Aziz and BasirSaibon

School of Electrical and Electronic Engineering, Universiti Sains Malaysia,14300 Nibong Tebal, Seberang Perai Selatan, Pulau Pinang,

MALAYSIAE-mail: eelaili eng.usm.mv, eezamna1(eng.usm.my, eezulfig(eng.usm.my, basiraeng.usm.my

Abstract The design of a CMOS down-conversion mixer using current modemultiplication technique is characterized. Fora mixer, the intermediate frequencyfIF at itsoutput is the result of the multiplication of theRF input function and the oscillation (LO)function. For this design, the multiplication iscarried out in current mode. This method isespecially suitable for circuits with low voltagesupply. The VRF and VLO voltages will first beconverted into the currents IRF and ILO,respectively, by using V-I converters beforethey are multiplied at the mixer stage. Theoperating voltage is at 1.2V. The intermediatefrequency is 200 MHz. Three filrst order basicfilters were cascaded to form the low passfilter that is neccesary to filter out the sum ofthe RF and LO frequencies. The overalldesign has good linearity. This is shown bythe values of its IP3 and P1dB which are14dBm and 11.75dBm respectively. Since thebiasing voltage is low, the power consumptionof this down-conversion mixer with filter isonly 62.67mW. Tanner S-Edit was used tocreate the schematics to generate the spice fileand Tanner T-Spice Pro v6.3 with transistormodel 0.5u CMOS technology was used forsimulation.

I. INTRODUCTION

Mixer is a device which can be found in awireless receiver. Figure I shows thearchitecture of a superheterodyne receiver.

Antenna

Figure 1: Block diagram of a single-stagesuperheterodyne receiver [2]

In this design, an IF filter (of the low pass

type) is included at the output of the mixer. Thesystem is designed such that only the differencefrequency of the RF and LO will be available atthe output of the filter. This is given by theequation below:

fIF =fRF fLo(1)The intermediate signal in this design has a

frequency of200MHz.

II. DESIGN OF THE DOWN-CONVERSIONMIXER CIRCUIT

The down-conversion mixer circuit can bedivided into the following three sections,

i. the core block, which consists of the currentmode CMOS mixer

ii. the CMOS V-I converter class ABiii. the low pass filter

Figure 2 shows the block diagram of theoverall down-conversion mixer circuit.

0-7803-8658-2/04/$20.00(c)2004 IEEE

VIF

fIF.

442

ICSE2004 Proc. 2004, Kuala Lumpur, Malaysia

4t For the current mode CMOS mixer, the mixingv, process occurs in current mode. Figure 3 shows

20OMHz the circuit of this mixer. The RF and LOvoltages will first be converted to current beforethey are fed into the mixer. The mathematicalderivation to show that the output current of themixer is resulted by the multiplication of twoinput currents is shown elsewhere [1].

Figure 2: Block diagram of the overall down-

conversion mixer

A. Current Mode CMOS MixerThe IF signal is generated by the mixer

through the multiplication process of the RFsignal and LO signal. The multiplication processcan be characterized by the trigonometricalidentity stated below:

(Acosm, tXBcosM 2t)

= AB [cOs(mI- X2)t +cos(l + W2)t]2

(2)

IF signal with two frequency components,

'IS-2 and 1+2 , is produced at the mixer

output.

B. CMOS V-I converter class AB

Figure 4 shows the schematic of a CMOS V-Iconverter class AB. This circuit is used toconvert the RF and LO signals from voltage tocurrent mode before the mixing process occurs ina mixer (as shown in Figure 2). This converter iscapable of receiving differential input voltageand converting them into differential outputcurrent.

12-

Schematic [4]

Schematic [1]

LJ+ '14\ / 1\, fr4

Symbol

Figure 3: Current mode CMOS mixer

DDE + + c I~~~out+>

VIN I0:D

Symbol

Figure 4: CMOS V-I converter class AB

Three first order filters were cascaded to formthe low pass filter that is necessary to filter outthe sum frequency of the RF and LO signals inthe IF signal. The circuitry of each low passfilter is shown in Figure 5.

0-7803-8658-2/04/$20.00(c)2004 IEEE

MixerVEY -

vol -

900MHz

700MH

vLo VLO

443

ICSE2004 Proc. 2004, Kuala Lumpur, Malaysia

TABLE ICHARACTERISTICS OF THE OVERALL DOWN-

CONVERTER MIXER

PddB 11.75dBmIIP3 164dBm

Power consumption- 62.67m

Figure 5: Schematic of a first order filter

The circuit is basically a transconductor.Resistors and capacitor have been added at thedrain terminals of transistor M5 and M6 in orderto make this circuit acts as a first order low passfilter. When small analysis is done on Figure 6,the transfer function is given by

v out Gmroutv. sCrou +1 (3)vin Coutl

If three first order filters are cascaded, then thetransfer function becomes

III. SIMULATION RESULTS

Simulation was done on the down-conversionmixer shown in Figure 7 by using Tanner T-Spice Pro v6.3 with transistor model 0.5u CMOStechnology.The differential amplitude of the output signal

from the mixer is 3OmV. The output of the lowpass filter, however, has an amplitude of44. 17mV. This shows that the filter does providesome gain. Finally, the output of the buffer isapproximately 3OmV. Buffer is used to provide50Q termination to the input of the next stage.The characteristics of the designed mixer is

summarised and shown in Table 1.

v ot 2GmR 3

vin 2sCR+If

vOut 8G 3R3out~ ~ (5)vin 8s3C3R3 + 12s2C2R2 + 6sCR + (

The cutoff frequency, f, can be determined byusing the following equation,

X J(1-2o2C2R 2 + (60CR - 8o3C3R3

The complete circuit of the down-conversion mixer represented by the blockdiagram of Figure 2 is shown in Figure 7.

vOI _ 8G 3 R3vIn (1I-122C2R2)+ j(6coCR-8co3C3R3)

64co06C6R6 + 48co4C4R4 + 12w)C2RC2-R = 0

0.035

0.03o.i-,025>, 0.02 |

04 015>

0.010.005

00 OOE+00 5.OOE+08 1.OOE+09 SOE+09

Frequency (Hz)2 OOE+09

Figure 6: Frequency spectrum of the buffer's outputsignal

(6)

(7)

0-7803-8658-2/04/$20.00(c)2004 IEEE

I I

444

ICSE2004 Proc. 2004, Kuala Lumpur, Malaysia

Figure 7: Complete circuit of the down-conversion mixer

l

IV. CONCLUSION

A 1.2V current mode all CMOS down-conversion mixer with filter has beencharacterized. The operating RF signal is900MHz with 700MFHz LO generating a200M-Hz IF at its output. The power

mfig+ R _Bgconsumption is a low 62.67mW. The mixerE | |also displays good linearity. This is shown

by the value of IIP3 and P1dB which is14dBm and 11.75dBm respectively.

Figure 8: IP3 plot of the overall down-conversion mixer

Figure 9: P1dB plot of the overall down-conversion mixer

REFERENCES

[I] Cheng Wang-Chi, Chan Cheong-Fat, ChoyChiu-Sing and Pun Kong-Pang, "A 900 MHz1.2V CMOS MIXER WITH HIGHLINEARITY", Circuit and Systems, 2002,ISCAS 2002, IEEE International Symposium,Volume:5, Page(s) 26-29, May 2002.

[2] Farag E. N., Elmasry M. 1., (2000). " MixedSignal VLSI Wireless Design Circuits andSystems ", Kluwer Academic Publishers.

[3] Johns D. A, Martin Ken, (1997), " AnalogIntegrated Circuit Design ", John Wiley &Sons, Inc.

[4] Lin Chi-Hung, Mohammad Ismail, TalesPimenta, "A 1.2V Micropower CMOS ClassA-B V-I Converter for VLSI Cells LibraryDesign", Circuits and Systems, 1998Proceeding, Page(s) 364-367, 1999.

0-7803-8658-2/04/$20.00(c)2004 IEEE 445