Slide Presentasi Mata Kuliah

Organisasi Komputer

Dosen :

Yan Everhard R, Ir. MT.Fakultas Teknologi InformatikaUniversitas BUDI LUHUR

Pendahuluan Komponen Hardware Komponen Software Komponen Brain wareKomputer adalah merupakan sesuatu sistem yang cukup kompleks, yang terdiri dari :Semua komponen tersebut diatas adalah merupakan suatu kesatuan utuh yang tidak dapat dipisahkan satu dengan yang lain.

Untuk melihat lebih jelas komputer pada aspek pendukungnya, maka dapat di lihat pada :Aspek Arsitektural Hal hal yang tampak bagi seorang user.Aspek Organisatorial Interkoneksi antar sistem pendukung.Dari paparan tersebut diatas maka komputer terdiri dari 3 elemen dasar, yaitu : Processor Memori Input Output System

Prinsip dasar yang ditetapkan oleh Von Neumann tentang komputer adalah Store Programmed Concept Penterjemahan dari prinsip dasar tersebut diatas adalah :

Data dan instruksi disimpan di memori utamaMemori ini dapat diakses melalui proses pengalamatanEksekusi data / instruksi terjadi dengan cara sequential.

Adapun urutan eksekusi terhadap data / instruksi adalah :Instruction FetchInstruction DecodeOperand FetchOperand Execute

Dari uraian tersebut diatas maka dapat dilihat bahwa elemen yang paling dominan pada proses eksekusi data / instruksi adalah main memori.

Hal ini dapat diterima karena main memori merupakan sentra kegiatan dari processor dan input output system didalam menangani aliran data / instruksi didalam komputer.

Dan pada saat awal sebuah komputer diaktifkan maka terjadi proses pemuatan data / intruksi yang dikenal sebagai proses POST ( Power On Self Test ), dimana proses tersebut main memori akan memberikan urutan langkah kerja dari prosesor didalam mempersiapkan mekanisme kerja secara keseluruhan.

MemoriMemory pada sistem komputer dapat dibedakan menjadi :

Internal memory Eksternal memory

Memory digunakan untuk menyimpan data atau program yang akan diproses oleh processor.

Berdasarkan sifat dari data tersebut yang berhubungan dengan pemrosesan maka dapat di katagorikan :

Data yang sedang diproses Data yang akan diproses Data yang belum diproses

Karakteristik penting dari sistem memory yang digunakan pada sistem komputer adalah :

Lokasi Processor Internal (Main) External (Secondary)

Kapasitas Ukuran Word ( Word size ) Jumlah Word

Satuan Transfer Word Block

Metoda aksesSequentialDirectRandomAssosiative

KinerjaAccess TimeCycle TimeTransfer Rate

Type fisikSemikonduktorMagnetic Optical

Karakteristik fisik : Volatile / Non Volatile Erasable / Non Erasable

Tiga konsep Unit of Transfer yang saling berhubungan bagi internal memori :

WordUkuran word biasanya sama dengan jumlah bit yang digunakan untuk merepresentasikan bilangan dan panjang instruksi.

Addressable UnitsPada sejumlah sistem, addressable unit adalah word. Namum terdapat sistem yang mengijinkan pengalamatan pada tingkat byte.

Unit Of TransferSatuan ini merupakan jumlah bit yang dibaca atau yang dituliskan kedalam memory pada suatu saat. Satuan transfer tidak perlu sama dengan word atau addressable unit. Bagi external memory seringkali data ditransfer dalam jumlah yang jauh lebih besar dari word dan hal ini dikenal sebagai block.

Hierarkhi Memory

Spektrum dari teknologi didalam sistem memory : Semakin kecil waktu akses, semakin besar harga perbit Semakin besar kapasitas, semakin kecil harga perbit Semakin besar kapasitas, semakin lama waktu akses

Dari gambar dibawah ini, jika kita bergerak turun dari atas ke bawah maka akan didapat :

Penurunan harga perbit Peningkatan kapasitas Peningkatan waktu akses ( waktu akses yang semakin lama ) Penurunan frekwensi akses memory oleh CPU

Traditional Memory Hierarchi

Contempory Memory Hierarchi

Memory SemikonduktorTipe tipe memory Semikonduktor :

RAM (Random Access Memory )Static RAMDinamic RAM

ROM ( Read Only Memory )Mask ROM programmed by factoryPROM ( Programmable ROM ) programmed by userErasable PROM ( EPROM ) UV Light ; Chip LevelElectrically Erasable PROM Electrical ; Byte LevelFlash ROM Electrical ; Block Leve

Random Access Memory

Merupakan memory Baca Tulis dimana isi dari RAM dapat diupdate setiap saat dan bersifat volatile serta digunakan data / instruksi selama pemrosesan berlangsung.

Dinamic RAM :

Terbuat dari bahan kapasitif Memerlukan daya operasional yang relatif kecil Kerapatan perkeping IC yang besar Memerlukan rangkaian Refresh Harga lebih murah Effisien untuk sistem sistem besar Kecepatan proses yang relatif lambat dibanding RAM Static

Static RAM :

Terbuat dari sistem transistor bipolarMemerlukan daya operasional yang relatif besarTidak memerlukan rangkaian Refresh, karena sifat dari transistor.Kerapatan perkeping IC yang sedikit ( kecil )Harga lebih mahalKecepatan proses yang tinggiEffisien untuk sistem sistem kecil dan sistem yang memerlukan kecepatan pemrosesan yang tinggi.

Read Only Memory ROM adalah memory yang berisi program yang bersifat tetap / tidak berubah sepanjang sistem yang digunakan memungkinkan.

Aplikasi penting dari ROM meliputi :

Microprogramming Library subroutine bagi fungsi fungsi yang sering diperlukan. Program program sistem yang berfunsi untuk mengatur kerja sistem secara keseluruhan. Tabel tabel fungsi sistem.

Sebelum operasi dari sistem komputer diaktifkan maka isi dari ROM akan di-load terlebih dahulu ke dalam RAM POST ( Power On Self Test ).

Permasalahan yang ada pada sistem ROM :

Langkah penyisipan data memerlukan biaya tetap yang tinggi Tidak boleh terjadi kesalahan sekecil apapun. Apabila ternyata dijumpai kesalahan pada satu bitnya maka ROM tersebut tidak dapat digunakan.

Untuk mengatasi hal tersebut diatas maka dibuatlah ROM yang dapat diprogram dan dihapus seperti halnya RAM.

Tiga macam Read mostly memory :

EPROM ( Erasable Programmable Read Only Memory ) EEPROM ( Electrically Erasable Programmable Read Only Memory ) Flash ROM / Flash Memory

Organisasi MemoryElemen dasar dari sebuah memory semikonduktor adalah sel memory yang didalam sistem elektronika digitalnya dikenal sebagai Flip Flop.

Seluruh sel memory memiliki sifat sifat tertentu : Sel memory memiliki dua keadaan stabil atau tidak stabil yang dapat digunakan untuk merepresentasikan bilangan biner 0 dan 1. Sel memory mempunyai kemampuan untuk ditulisi untuk men-set keadaan. Sel memory mempunyai kemampuan untuk dibaca untuk merasakan keadaan. Sel memory secara keseluruhan mempunyai kemampuan untuk diberikan nilai awal yang sama.

Error Correction pada RAMError pada memory semikonduktor dapat dikategorikan sebagai kegagalan yang berat dan kegagalan yang ringan.

Kegagalan yang berat merupakan kerusakan fisik permanen sehingga sel memory yang mengalaminya tidak dapat lagi digunakan untuk menampung data. Kegagalan yang ringan adalah kejadian yang random dan tidak merusak atau yang mengubah isi sebuah sel memory atau lebih, tanpa merusak memory secara permanen. Kegagalan ringan ini salah satunya dapat disebabkan oleh masalah catu daya yang tidak stabil.

Untuk mengantisipasi kegagalan tersebut diatas maka :

Untuk kegagalan yang berat / fatal maka sistem komputer secara keseluruhan akan berhenti untuk beroperasi.Untuk kegagalan yang ringan maka dapat dilakukan melalui mekanisme Error Correction dengan menggunakan metoda Hamming Code.

Tetapi perlu dicatat bahwa yang dimaksud dengan kegagalan yang ringan, yang dapat diantisipasi dengan menggunakan metoda Hamming Code adalah kegagalan yang terjadi pada single bit saja.

Suatu error correction dapat dibuat untuk menjaga agar validasi dari data yang dibaca maupun ditulis adalah absah.

Jika M bit disimpan pada RAM maka untu koreksi dengan Hamming Code diperlukan K bit tambahan, sehingga ukuran aktual dari word memori yang disimpan adalah M+K bit.

Dengan sistem tersebut diatas maka akan didapatkan kondisi

Jika tidak ada kesalahan maka data bit yang diminta akan dikirimkan.Jika ada kesalahan dan dimungkinkan untuk dikoreksi dilakukan perbaikan.Jika ada kesalahan dan tidak dimungkinkan untuk diperbaiki error signal

Untuk sistem proteksi memory saat ini digunakan gabungan Parity dan Hamming Code.

Hamming CodeMetoda perbaikan / pemulihan kesalahan data tersimpan yang didasarkan atas penambahan bit bit pendeteksian kesalahan yang memberi kemampuan penerima untuk melakukan koreksi terhadap kesalahan yang terjadi.

Bit bit yang disisipkan pada data yang akan dikirim biasanya disebut sebagai bit hamming

Posisi bit bit hamming dinyatakan dalam posisi 2n, dengan n = 0,1,2,3,4,5,

D : Data 0 / 1 H : Hamming Code

D11HD10D9D8D7D6D5D4HD3D2D1HD0HH1716151413121110987654321

Memory

f

f

Compare

Corrector

Data M

K

M

K

Data Out M

Error Signal

Memory Semikonduktor pada KomputerSIMM

Single In - line Memory ModuleMempunyai jumlah pin 30 atau 72 pinPin 30 Banyak digunakan untuk PC zaman 80286-80486 dan beroprasi pada 16 bitPin 72 digunakan PC dengan processor intel dan beroperasi pada 32 bit

DIMM

Dual In - line Memory Module.Dual berarti kedua sisi menjalankan sekuens proses program masing-masing namun masih dapat menjalankan proses yang samaDIMM sekarang telah mencapai lebar data sebanyak 68 bit

EDO DRAM (Extended Data Out Dynamic RAM)SDRAM (Synchronous Dynamic RAM) beroperasi pada 66 Mhz, 100 Mhz, 133 Mhz.DDR RAM (Double Data Rate RAM)beroperasi pada200 Mhz, 266 Mhz, 333 Mhz, 400 Mhz) spesifikasi fabrikan : DDR200 /PC1600 = 1,6 GB/sec DDR266 /PC2100 = 2,1 GB/sec DDR333 /PC2700 = 2,7 GB/sec DDR400/PC3200 = 3,2 GB/secDDR SDRAM ( Double Data Rate Synchronous DRAM )R DRAM ( Rambus DRAM )

DDR 2 RAM beroperasi pada 400 Mhz, 533 Mhz, 667 Mhz spesifikasi fabrikan : DDR2-400 / PC2-3200 DDR2-533 / PC2-4200 DDR2-667 / PC2-5300 DDR2-800 / PC2-6400

SIMM RAM Beroperasi pada tegangan 5 V

Notch Key Definition

SDRAMberoperasi pada tegangan 2,5 V

DDR SDRAM beroperasi pada tegangan 2,5 V

DDR 2 beroperasi pada tegangan 1,8 V

Dual Channel MemoryMenambah tenaga bandwidth antara memory dan processor menjadi 2 jalurJalur transfer menjadi 128 bit yg tadinya 64 bitEx : memory single channel DDR400/PC3200 mengalirkan data 400Mhz x 64 bits = 3.2 GB/sec.Maka dengan dual channel =6.4 GB/sec

Dual-channel architecture describes a technology that theoretically doubles data throughput from RAM to the memory controller. Dual-channel-enabled memory controllers utilize two 64-bit data channels, resulting in a total bandwidth of 128-bits, to move data from RAM to the CPU.

Dual-channel technology was created to address the issue of bottlenecks. Increased processor speed and performance requires other, less prominent components to keep pace. In the case of dual channel design, the intended target is the memory controller, which regulates data flow between the CPU and system memory (RAM). The memory controller determines the types and speeds of RAM as well as the maximum size of each individual memory module and the overall memory capacity of the system. When the memory is unable to keep up with the processor, however, a bottleneck occurs, leaving the CPU with nothing to process. Under the single-channel architecture, any CPU with a bus speed greater than the memory speed would be susceptible to this bottleneck effect.

Front Side Bus In personal computers, the Front Side Bus (FSB) is the data transfer bus that carries information between the CPU and the northbridge of the Motherboard.

Some computers also have a back side bus which connects the CPU to a memory cache. This bus and the cache memory connected to it are faster than accessing the system RAM via the front side bus.

The bandwidth or maximum theoretical throughput of the front side bus is determined by the product of the width of its data path, its clock frequency (cycles per second) and the number of data transfers it performs per clock cycle. For example, a 32-bit (4-byte) wide FSB operating at a frequency of 100 MHz that performs 4 transfers per cycle has a bandwidth of 1600 megabytes per second (MB/s).

Mother Board Diagram

Notice that many manufacturers today publish the speed of the FSB in megatransfers per second (MT/s), not the FSB clock frequency in megahertz (MHz). This is because the actual speed is determined by how many transfers can be performed each clock cycle as well as by the clock frequency. For example, if a motherboard (or processor) has a FSB clocked at 200 MHz and performs 4 transfers per clock cycle, the FSB is rated at 800 MT/s.

History and Current usage The front side bus is an alternative name for the data and address buses of the CPU as defined by the manufacturer's datasheet. The term is mostly associated with the various CPU buses used on PC-related motherboards (including servers etc), seldom with the data and address buses used in embedded systems and similar small computers.

Front side buses serve as a connection between the CPU and the rest of the hardware via a so called chipset. This chipset is usually divided in a northbridge and a southbridge part, and is the connection points for all other buses in the system.

Buses like the PCI, AGP, and memory buses all connect to the chipset in order for data to flow between the connected devices. These secondary system buses usually run at speeds derived from the front side bus clock, but are not necessarily synchronous to it.

Related Component Speeds CPU

The frequency at which a processor (CPU) operates is determined by applying a clock multiplier to the front side bus (FSB) speed. For example, a processor running at 3200 MHz might be using a 400 MHz FSB. This means there is an internal clock multiplier setting (also called bus/core ratio) of 8. That is, the CPU is set to run at 8 times the frequency of the front side bus: 400 MHz 8 = 3200 MHz. By varying either the FSB or the multiplier, different CPU speeds can be achieved.

MemorySetting a FSB speed is related directly to the speed grade of memory a system must use. The memory bus connects the northbridge and RAM, just as the front side bus connects the CPU and northbridge. Often, these two buses must operate at the same frequency. Increasing the front-side bus to 450 MHz in most cases also means running the memory at 450 MHz.

In newer systems, it is possible to see memory ratios of "4:5" and the like. The memory will run 5/4 times as fast as the FSB in this situation, meaning a 400 MHz bus can run with the memory at 500 MHz. This is often referred to as an asynchronous system. It is important to realize that due to differences in CPU and system architecture, overall system performance can vary in unexpected ways with different FSB-to-memory ratios.

In image, audio, video, gaming and scientific applications that perform a small amount of work on each element of a large data set, FSB speed becomes a major performance issue.

A slow FSB will cause the CPU to spend significant amounts of time waiting for data to arrive from system memory.

However, if the computations involving each element are more complex the processor will spend longer performing these and the FSB will be able to keep pace, because the rate at which memory is accessed is reduced.

Peripheral BusesSimilar to the memory bus, the PCI and AGP buses can also be run asynchronously from the front side bus.

In older systems, these buses operated at a set fraction of the front side bus frequency. This fraction was set by the BIOS.

In newer systems the PCI, AGP, and PCI Express peripheral buses often receive their own clock signals, which eliminates their dependence on the front side bus for timing.

Over ClockingOverclocking is the practice of making computer components operate beyond their stock performance levels.

Many motherboards allow the user to manually set the clock multiplier and FSB settings by changing jumpers or BIOS settings. Many CPU manufacturers now "lock" a preset multiplier setting into the chip. It is possible to unlock some locked CPUs; for instance, some Athlons can be unlocked by connecting electrical contacts across points on the CPU's surface. For all processors, increasing the FSB speed can be done to boost processing speed.

This practice pushes components beyond their specifications and may cause erratic behaviour, overheating or premature failure.

Even if the computer appears to run normally, problems may appear under heavy load. For example, during Windows Setup, you may receive a file copy error or experience other problems. Most PCs purchased from retailers or manufacturers, such as Hewlett-Packard or Dell, do not allow the user to change the multiplier or Front Side Bus settings due to the probability of erratic behavior or failure.

Motherboards purchased separately to build a custom machine are more likely to allow the user to edit the multiplier and FSB settings in the PC's BIOS.

North Bridge

The name is derived from drawing the architecture in the fashion of a map. The CPU would be at the top of the map at due north. The CPU would be connected to the chipset via a fast bridge (the North Bridge) located north of other system devices as drawn. The northbridge would then be connected to the rest of the chipset via a slow bridge (the South Bridge) located south of other system devices as drawn.

The North Bridge, also known as the memory controller hub (MCH) in Intel systems (AMD, VIA, SiS and others usually use 'northbridge'), is traditionally one of the two chips in the core logic chipset on a PC motherboard, the other being the southbridge.

Separating the chipset into North Bridge and South Bridge is common, although there are rare instances where these two chips have been combined onto one die when design complexity and fabrication processes permit it.

The North Bridge typically handles communications among the CPU, RAM, AGP or PCI Express, and the southbridge.

Some North Bridges also contain integrated video controllers, which are also known as a Graphics and Memory Controller Hub (GMCH) in Intel systems.

Because different processors and RAM require different signalling, a North Bridge will typically work with only one or two classes of CPUs and generally only one type of RAM.

There are a few chipsets that support two types of RAM (generally these are available when there is a shift to a new standard).

For example :

The northbridge from the NVIDIA nForce2 chipset will only work with Socket A processors combined with DDR SDRAM The Intel i875 chipset will only work with systems using Pentium 4 processors or Celeron processors that have a clock speed greater than 1.3 GHz and utilize DDR SDRAM.The Intel i915g chipset only works with the Intel Pentium 4 and the Celeron, but it can use DDR or DDR2 memory.

The North Bridge on a particular system's motherboard is the most prominent factor in dictating the number, speed, and type of CPU(s) and the amount, speed, and type of RAM that can be used.

Other factors such as voltage regulation and available number of connectors also play a role. Virtually all consumer-level chipsets support only one processor series, with the maximum amount of RAM varying by processor type and motherboard design.

Pentium-era machines often had a limitation of 128 MB, while most Pentium 4 machines have a limit of 4 GB. Since the Pentium Pro, the Intel architecture can accommodate physical addresses larger than 32 bits, typically 36 bits, which gives up to 64 GB of addressing, though motherboards that can support that much RAM are rare because of other factors (operating system limitations and expense of RAM).

The North Bridge hosts its own memory lookup table (I/O memory management unit), a mapping of the addresses and layout in main memory.

The North Bridge plays an important part in how far a computer can be overclocked, as its frequency is used as a baseline for the CPU to establish its own operating frequency.

In today's machines, this chip is becoming increasingly hotter as computers become faster. It is no longer unusual for the North Bridge to use a heatsink or even some kind of active cooling.

South Bridge

The name is derived from drawing the architecture in the fashion of a map and was first described as such with the introduction of the PCI Local Bus Architecture into the PC platform in 1991.

The authors of the PCI spec at Intel viewed the PCI local bus as being at the very center of the PC platform architecture.The so called North Bridge extends to the north of PCI in support of CPU, Memory/Cache and other performance critical capabilities.

Likewise the South Bridge extends to the south of the PCI bus backbone and bridged to less performance critical I/O capabilities such as the disk interface, audio, etc.

The South Bridge, also known as the I/O Controller Hub (ICH) in Intel systems (AMD, VIA, SiS and others usually use 'southbridge'), is a chip that implements the "slower" capabilities of the motherboard in a northbridge/southbridge chipset computer architecture.

The South Bridge can usually be distinguished from the North Bridge by not being directly connected to the CPU. Rather, the Borth Bridge ties the southbridge to the CPU.

The functionality found on a contemporary southbridge includes:PCI bus. The PCI bus support includes the traditional PCI specification, but may also include support for PCI-X and PCI Express.

ISA Bus. Though the ISA support is rarely utilized, it has interestingly managed to remain an integrated part of the modern South Bridge. The ISA Bus provides a data and control path to the Super I/O (the normal attachment for the keyboard, mouse, parallel port, serial port, IR port, and floppy controller) and FWH (firmware hub which provides access to BIOS flash storage).SPI bus. The SPI bus is a simple serial bus mostly used for firmware (e.g., BIOS) flash storage access.SMBus. The SMBus is used to communicate with other devices on the motherboard (e.g. system temperature sensors, fan controllers).DMA controller. The DMA controller allows ISA Bus devices direct access to main memory without needing help from the CPU.Interrupt controller. The interrupt controller provides a mechanism for attached devices to get attention from the CPU.

IDE (SATA or PATA) controller. The IDE interface allows direct attachment of system hard drives.Real Time Clock. The real time clock provides a persistent time account.Power management (APM and ACPI). The APM or ACPI functions provide methods and signaling to allow the computer to sleep or shut down to save power.Nonvolatile BIOS memory. The system CMOS, assisted by battery supplemental power, creates a limited non-volatile storage area for system configuration data.AC97 or Intel High Definition Audio sound interfaceBaseboard Management Controller

Optionally, the southbridge will also include support for Ethernet, RAID, USB, audio codec, and FireWire.

COMPUTER BUS In computer architecture, a bus is a subsystem that transfers data between computer components inside a computer or between computers. Unlike a point-to-point connection, a bus can logically connect several peripherals over the same set of wires. Each bus defines its set of connectors to physically plug devices, cards or cables together.

Early computer buses were literally parallel electrical buses with multiple connections, but the term is now used for any physical arrangement that provides the same logical functionality as a parallel electrical bus. Modern computer buses can use both parallel and bit-serial connections, and can be wired in either a multidrop (electrical parallel) or daisy chain topology, or connected by switched hubs, as in the case of USB.

Examples of internal computer busesParallelASUS Media Bus proprietary, used on some ASUS Socket 7 motherboards CAMAC for instrumentation systems Extended ISA or EISA Industry Standard Architecture or ISA MicroChannel or MCA Multibus for industrial systems NuBus or IEEE 1196 OPTi local bus used on early Intel 80486 motherboards. Peripheral Component Interconnect or PCI S-100 bus or IEEE 696, used in the Altair and similar microcomputers SBus or IEEE 1496 VESA Local Bus or VLB or VL-bus STD Bus for 8- and 16-bit microprocessor systems

Serial1-Wire HyperTransport IC PCI Express or PCIe Serial Peripheral Interface Bus or SPI bus FireWire i.Link or IEEE 1394

Examples of external computer busesParallelAdvanced Technology Attachment or ATA ( PATA, IDE, EIDE, ATAPI, etc.) disk/tape peripheral attachment bus (the original ATA is parallel, but see also the recent serial ATA) HIPPI High Performance Parallel Interface IEEE-488 ( GPIB, General-Purpose Instrumentation Bus, and HPIB, Hewlett-Packard Instrumentation Bus) PC card, previously known as PCMCIA, much used in laptop computers and other portables, but fading with the introduction of USB and built-in network and modem connections SCSI Small Computer System Interface, disk/tape peripheral attachment bus

SerialUSB Universal Serial Bus, used for a variety of external devices Serial Attached SCSI and other serial SCSI buses serial ATA Controller Area Network ("CAN bus") EIA-485 FireWire

Industry Standard Architecture ( ISA )

ISA Industry Standard Architecture

Year created:1981Created by:IBMSuperseded by:PCI (1993)Width:8 or 16 bitsNumber of devices:1 per slotCapacity8 MHzStyle:ParallelHotplugging:noExternal:no

Bus ISA (Industry Standard Architecture) adalah sebuah arsitektur bus dengan bus data selebar 8-bit yang diperkenalkan dalam IBM PC 5150 pada tanggal 12 Agustus 1981.

Bus ISA diperbarui dengan menambahkan bus data selebar menjadi 16-bit pada IBM PC/AT pada tahun 1984, sehingga jenis bus ISA yang beredar pun terbagi menjadi dua bagian, yakni ISA 16-bit dan ISA 8-bit.

ISA merupakan bus dasar dan paling umum digunakan dalam komputer IBM PC hingga tahun 1995, sebelum akhirnya digantikan oleh bus PCI yang diluncurkan pada tahun 1992.

Extended Industry Standard Architecture

EISA Extended Industry Standard Architecture Three EISA Slots.Year created:1988Created by:Gang of NineSuperseded by:PCI (1993)Width:32 bitsNumber of devices:1 per slotCapacity:8.33MHzStyle:ParallelHotplugging:NoExternal:No

The Extended Industry Standard Architecture (in practice almost always shortened to EISA is a bus standard for IBM compatible computers.

It was announced in late 1988 by PC clone vendors (the "Gang of Nine") as a counter to IBM's use of its proprietary MicroChannel Architecture (MCA) in its PS/2 series.

EISA extends the AT bus, which the Gang of Nine retroactively renamed to the ISA bus to avoid infringing IBM's trademark on its PC/AT computer, to 32 bits and allows more than one CPU to share the bus. The bus mastering support is also enhanced to provide access to 4 GB of memory. EISA can accept older XT and ISA boards the lines and slots for EISA are a superset of ISA.

The first EISA computers to hit the market were the Compaq Deskpro 486 and the SystemPro.

The SystemPro, being one of the first PC-style systems designed as a network server, was built from the ground up to take full advantage of the EISA bus.

It included such features as multiprocessing, hardware RAID, and bus-mastering network cards.

VESA Local Bus

The VESA Local Bus (usually abbreviated to VL-Bus or VLB) was mostly used in personal computers.VESA Local Bus worked alongside the ISA bus; it acted as a high-speed conduit for memory-mapped I/O and DMA, while the ISA bus handled interrupts and port-mapped I/O.

A VLB slot itself was an extension of an existing ISA slot. Indeed, both VLB and ISA cards could be plugged into a VLB slot (although not at the same time.)

The extended portion was usually coloured a distinctive brown. This made VLB cards quite long, reminiscent of the expansion cards from the old XT days.

The addition resembled a PCI slot, and indeed VLB and PCI use the same physical connector. The length of a VLB slot led to an alternate expansion of the acronym: Very Long Bus.

The VESA Local Bus was designed as a stopgap solution to the problem of the ISA bus's limited bandwidth. VLB had several flaws that served to limit its useful life substantially:80486 dependence. The VESA Local Bus relied heavily on the 80486's memory bus design. When the Pentium processor started to gain mass acceptance, circa 1995, there were major differences in its bus design, and the VESA Local Bus was not easily adaptable. This also made moving the bus to non-x86 architectures nearly impossible. Few Pentium motherboards with VLB slots were ever made. IBM offered an OPAL motherboard based on the IBM 486SLC2 CPU with two VLB slots.Limited number of slots available. Most PCs that used VESA Local Bus had only one or two slots available, as opposed to 5 or 6 ISA slots. This was because, as a direct branch of the 80486 memory bus, the VESA Local Bus did not have the electrical ability to drive more than 1 or 2 (or 3 at the most) cards at a time.

Reliability problems. The same electrical problems that limited the VESA Local Bus to 2 or 3 slots also limited its reliability. Glitches between cards were common, especially on low-end motherboards, and when important devices such as hard disk controllers were attached to the bus, there was the all-too-common possibility of massive data corruption.Installation woes. The length of the slot and number of pins made VLB cards notoriously difficult to install and remove. The sheer mechanical effort required was stressful to both the card and the motherboard, and breakages were not uncommon. This was compounded by the extended length of the card logic board; often there was not enough room in the PC case to angle the card into the slot, requiring it to be pushed with great force straight down into the slot.

Technical data

Bus width32 bitsCompatible with 8 bit ISA, 16 bit ISA, VLBPins112Vcc+5VClock486SX-25: 25 MHz 486DX2-50: 25 MHz 486DX-33: 33 MHz 486DX2-66: 33 MHz 486DX4-100: 33 MHz 486DX-40: 40 MHz 486DX2-80: 40 MHz 486DX4-120: 40 MHz

Peripheral Component Interconnect

PCI Peripheral Component Interconnect Year created:July 1993 Created by:Intel Superseded by:PCI Express (2004) Width:32 or 64 bits Number of devices:1 per slot Capacity:133MB/s Style:Parallel Hotplugging:no External:no

The Peripheral Component Interconnect, or PCI Standard (in practice almost always shortened to PCI), specifies a computer bus for attaching peripheral devices to a computer motherboard.

The PCI bus is common in modern PCs, where it has displaced ISA and VESA Local Bus as the standard expansion bus, but it also appears in many other computer types.

The bus is being succeeded by PCI Express, which launched in 2004 and offers much higher bandwidth. As of 2007 the PCI standard is still used by many legacy and new devices that do not require the higher bandwidth of PCI-E. New computers are also still provided with ample PCI slots.

Typical PCI cards used in PCs include: network cards, sound cards, modems, extra ports such as USB or serial, TV tuner cards and disk controllers.

Historically video cards were typically PCI devices, but growing bandwidth requirements soon outgrew the capabilities of PCI.

Today PCI video cards are uncommon and principally at the lower end of the market. Many devices traditionally provided on expansion cards are now commonly integrated onto the motherboard itself, meaning that modern PCs often have no cards fitted.

However, PCI is still used for certain specialized cards, although many tasks traditionally performed by expansion cards may now be performed equally well by USB devices.

PCI Express

PCI Express

Year created:2004Created by:IntelWidth:1 bitNumber of devices:1 per slotCapacity:8 GB/s (v1.1, x32)Style:SerialHotplugging:Depends on form factorExternal:Depends on form factor

PCI Express, officially abbreviated as PCI-E or PCIe, is a computer expansion card interface format introduced by Intel in 2004.

PCI Express was designed to replace the general-purpose PCI expansion bus, the high-end PCI-X bus and the AGP graphics card interface.

Unlike previous PC expansion interfaces, rather than being a bus it is structured around point-to-point serial links called lanes.

A PCI Express link is built around pairs of serial (1-bit), unidirectional point-to-point connections known as "lanes". This is in sharp contrast to the PCI standard which is a bus-based system in which all the devices share the same bidirectional, 32-bit (or 64-bit), parallel signal path.

In PCIe 1.1 (currently the most common version) each lane sends information at a rate of 250 MB/s (250 million bytes per second) in each direction. PCIe 2.0 doubles this data rate, introduced in late 2007,

PCIe 2.0 is found on newer systems such as those based around the Intel X38 or AMD 780G chipsets. The latest proposed PCIe 3.0 standard will increase the speed of the links further (tentatively scheduled for release around 2010).

Each PCIe slot carries either one, two, four, eight, sixteen or thirty-two lanes of data between the motherboard and the addin card.

Lane counts are written with an "x" prefix e.g. x1 for a single-lane card and x16 for a sixteen-lane card. Thirty-two lanes of 250 MB/s (PCIe 1.1) gives a maximum transfer rate of 8 GB/s (250 MB/s x 32, i.e., 8 billion bytes per second) in each direction. However the largest size in common use for PCIe 1.1 is x16, giving a transfer rate of 4 GB/s (250 MB/s x 16) in each direction. Putting this into perspective, a single lane for PCIe 1.1 has nearly twice the data rate of normal PCI, a four-lane slot has a transfer rate comparable to the fastest version of the old parallel PCI-X 1.0, and an eight-lane slot has a transfer rate comparable to the fastest version of AGP. However the data rates cited must be derated because 8b/10b coding is used in the physical layer. The link transfer speeds cited are to be considered maximum theoretical data rates

HyperTransportHyperTransport (HT), sebelummya dikenal sebagai Lightning Data Transport (LDT), adalah sebuah saluran komunikasi dua arah (bidirectional) yang dapat mentransmisikan data secara serial atau paralel serta memiliki kecepatan tinggi dan latency yang rendah.

Bus ini diperkenalkan pada tanggal 2 April 2001. Adalah sebuah konsorsium yang disebut sebagai HyperTransport Consortium yang bertugas untuk mempromosikan dan mengembangkan teknologi HyperTransport.

Teknologi ini digunakan oleh AMD dan Transmeta dalam prosesor dengan arsitektur x86 dan AMD64; PMC-Sierra, Broadcom, dan Raza Microelectronics dalam prosesor dengan arsitektur MIPS; AMD, NVIDIA, VIA, SiS, dan Hewlett-Packard dalam chipset motherboard komputer pribadi; Hewlett-Packard, Sun Microsystems, IBM, dan IWill dalam server; Cray, Newisys, dan QLogic dalam komputer berperforma tinggi (High-performance computer/cluster); Microsoft dalam Xbox Game Console; serta Cisco Systems dalam router yang dirilisnya.

Satu-satunya raksasa dalam bidang mikroelektronik yang absen dari daftar di atas adalah Intel yang terus menggunakan arsitektur bus yang dipakai bersama-sama

HyperTransport datang dalam tiga versi, yakni versi 1.0, 2.0 dan 3.0 yang berjalan dari kecepatan 200 MHz hingga 2600 MHz. Hal ini jelas sangat kontras dengan kecepatan bus PCI yang hanya berkisar pada kecepatan 33 MHz atau 66 MHz. Koneksi ini juga menggunakan Double Data Rate (DDR) sehingga dapat mentransmisikan data dua kali lebih banyak pada kecepatan yang sama. Dengan menggunakan teknik seperti ini, HyperTransport dapat mentransfer data hingga 5200 Megatransfer per detik (MT/detik) ketika berjalan pada kecepatan 2600 MHz.HyperTransport mendukung penggunaan ukuran bit yang dapat ditransfer (banyak lajur), yang berkisar antara 2 bit hingga 32 bit. Dengan begitu, HyperTransport dapat mentransmisikan banyak data dalam tiap clock-nya. Untuk sebuah interkoneksi 2600 MHz, 32-bit, maka HyperTransport dapat mentransfer data hingga 20800 Megabyte/detik. Bus-bus yang memiliki lebar lajur yang berbeda dapat digabungkan menjadi sebuah bus.