e&e assignment

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UNIVERSITI TEKNIKAL MALAYSIA MELAKA HANG TUAH JAYA, 76100 DURIAN TUNGGAL, MELAKA, MALAYSIA. Group assignment (beng 1113) Principle of electric & electronic Faculty of Manufacturing Engineering Department of Manufacturing Management Semester 1 2012/2013 Lecturer: Miss Badariah Date of Submission: 20 th December 2012 Group Members :---( Group 19) No Name Matric Number 1 MUHAMMAD HAFIZZUDIN BIN HAIROIBALIZAH B051210164 2 NG QI MUN B051210069 3 NIK NUR FARHANA BINTI NIK MAHMOOD B051210174 4 NIRMESSINI A/P MASELAH MANI B051210108 *********************************************************

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Electric and Electronic Assignment

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Page 1: E&E Assignment

UNIVERSITI TEKNIKAL MALAYSIA MELAKAHANG TUAH JAYA,76100 DURIAN TUNGGAL,MELAKA, MALAYSIA.

Group assignment (beng 1113)Principle of electric & electronic

Faculty of Manufacturing EngineeringDepartment of Manufacturing Management

Semester 1 2012/2013

Lecturer: Miss Badariah

Date of Submission: 20th December 2012

Group Members :---( Group 19)

No Name Matric Number1 MUHAMMAD HAFIZZUDIN BIN HAIROIBALIZAH B0512101642 NG QI MUN B0512100693 NIK NUR FARHANA BINTI NIK MAHMOOD B0512101744 NIRMESSINI A/P MASELAH MANI B051210108

*********************************************************

Received by:

………………………(Miss Badariah)Lecturer Faculty of Electronics & Computer EngineeringUniversiti Teknikal Malaysia Melaka

Page 2: E&E Assignment

Group Assignment

BENG 1113

Principle of Electric and Electronics

TITLE:

ELECTRONICS

DIGITAL SYSTEM

Page 3: E&E Assignment

Introduction to Digital Logic, Signals and Gates

Digital logic is the foundation for digital computers.  Digital logic used to understand the innards of computers. Digital logic has relations to other kinds of logic including Formal logic and Fuzzy logic. Formal logic is more to philosophy departments whereas Fuzzy logic is a tool used to design control systems and many other systems.

Basics of digital logic involve zeroes and ones (0s and 1s) which represent signals as sequences of zeroes and ones. If one wants to know how large arrays of zeroes and ones can be used in computer files to store information in pictures, documents, sounds and even movies then he or she should learn about how information can be transmitted, between computers and digital signal sources.

Detailed information about digital circuits such as gates, flip-flops and memory elements also needed in order to design circuits that able to manipulate digital signals.

The constructions of the simple arithmetic logic gates also use to demonstrate the theory of digital system. This assignment will guide the reader to use simple combination of logic gates to create a complex and useful application.

Page 4: E&E Assignment

Objectives To understand and solve the binary arithmetic problems.

To understand the basic rules of Boolean algebra.

To determine logic circuits to implement Boolean functions.

To minimize Boolean expression using Karnaugh Map (K- Map) .

To construct logic circuit by using combination of logic gates.

To be familiar with Multisim (a computer program which stimulate digital and analog circuits.

To strengthen our knowledge related to digital system.

Page 5: E&E Assignment

Equipment

Laptop equipped with Multism Software

Reference Books ( Foundation of Electric and Electronic)

Lecture Notes

Calculator

Stationaries

Page 6: E&E Assignment

Theory1. Truth Table

A truth table is a mathematical table used in logic—specifically in connection with Boolean algebra, Boolean functions, and propositional calculus—to compute the functional values of logical expressions on each of their functional arguments, that is, on each combination of values taken by their logical variables. In particular, truth tables can be used to tell whether a propositional expression is true for all legitimate input values, that is, logically valid.

Practically, a truth table is composed of one column for each input variable (for example, A and B), and one final column for all of the possible results of the logical operation that the table is meant to represent (for example, A XOR B). Each row of the truth table therefore contains one possible configuration of the input variables (for instance, A=true B=false), and the result of the operation for those values. 

2. Karnaugh Map (K-Map)

The Karnaugh map (K-map for short), Maurice Karnaugh's 1953 refinement of Edward Veitch's 1952 Veitch diagram, is a method to simplify Boolean algebra expressions. The Karnaugh map reduces the need for extensive calculations by taking advantage of humans' pattern-recognition capability. It also permits the rapid identification and elimination of potential race conditions.

The required Boolean results are transferred from a truth table onto a two-dimensional grid where the cells are ordered in Gray code, and each cell represents one combination of input conditions. Optimal groups of 1s or 0s are identified, which represent the terms of a canonical form of the logic in the original truth table. These terms can be used to write a minimal Boolean expression representing the required logic.

Karnaugh maps are used to simplify real-world logic requirements so that they can be implemented using a minimum number of physical logic gates. A sum-of-products expression can always be implemented using AND gates feeding into an OR gate, and a product-of-sums expression leads to OR gates feeding an AND gate. Karnaugh maps can also be used to simplify logic expressions in software design. Boolean conditions, as used for example in conditional statements, can get very complicated, which makes the code difficult to read and to maintain. Once minimised, canonical sum-of-products and product-of-sums expressions can be implemented directly using AND and OR logic operators.

Page 7: E&E Assignment

3. Boolean Algebras

Boolean algebra was developed by George Boole in the 19th century in order to determine the truth or falsehood of logical prepositions. Boolean algebra has been especially successful in the Electronics and computing fields because it can be used to model binary systems and the resulting equations can easily be implemented using gates.

Associative Rule :

Associativity is the property of algebra that the order of evaluation of the terms is immaterial.

Distributive Rule :

Provide logic equation of factorisation and expansion

Commutative Rule :

Order of presentation of the terms is of no consequence

De Morgan's Law :

Provide logic equation of factorisation and expansion

Page 8: E&E Assignment

4. Digital Gates

A logic gate is an idealized or physical device implementing a Boolean function, that is, it performs a logical operation on one or more logic inputs and produces a single logic output. Depending on the context, the term may refer to an ideal logic gate, one that has for instance zero rise time and unlimited fan-out, or it may refer to a non-ideal physical device[1] (see Ideal and real op-amps for comparison).

Logic gates are primarily implemented using diodes or transistors acting as electronic switches, but can also be constructed using electromagnetic relays (relay logic), fluidic logic, pneumatic logic, optics, molecules, or even mechanical elements. With amplification, logic gates can be cascaded in the same way that Boolean functions can be composed, allowing the construction of a physical model of all of Boolean logic, and therefore, all of the algorithms and mathematics that can be described with Boolean logic.

Page 9: E&E Assignment

ProceduresOverall Procedure :

Throughout The Project …

1) Firstly, we made a discussion between our group members in the library to find the

solution for the tasks.

2) Based on the tasks , we planned the project and sketched the block diagram designing

to an appropriate level of detail (truth table , K-Map , logic gates , etc)

3) We discussed and converted the Boolean expression into truth table.

4) Then , we constructed the truth table. Besides , the function is also minimized by using

the K-Map.

5) The truth table is illustrated by using a combination of suitable logic gates.

6) We converted the decimal number into binary number to get the output of the

converter.

7) Multisim is installed in order to design the required circuit. By using multisim , we

simulated the design.

8) We monitored and controlled the Multisim , troubleshooting the design to meet the

specification design.

9) In the same time , our group make some research on these tasks on the internet and

reference books.

We divided the tasks on finishing this report among our group members. After that ,

we discussed one more time for any correction on the report and to make sure that the

report is complete , without any error.

10) Last but not least , we made our best preparation for the presentation.

Page 10: E&E Assignment

Specified Procedure according to task :

Task 1:- A combination of suitable logic gates is drawn due to the Boolean expression is

given as follow:

F=x y+xyz⨁ y z

- A truth table is drawn as shown in the result.- The output is verified by using Multisim software.

Task 2:- A combination of suitable logic gates is drawn due to the Boolean expression is

given as follow:

y=A BC+BC+A B

- A truth table is drawn as shown in the result.- Multisim software is used to ensure the output in truth table is accurately found.- The result in truth table is simplified by using K-Map.- Another combination of suitable logic gates is drawn according to the simplified

function done by using K-Map.- The output is verified by using Multisim software.

Task 3:- The decimal number given is converted to binary number by using scientific

calculator.- A truth table is drawn as shown in the result to get the output stated as in the

question.- A Boolean expression is constructed based on the truth table drawn.- The Boolean expression is simplified by using K-Map due to the original

expression was complicated.- A combination of suitable logic gates is drawn followed the simplified function

done by K-Map.- The output is verified by using Multisim software.

Page 11: E&E Assignment

ResultsTask 1:1. The logic gates are drawn as in Attachment 1.2. A truth table is constructed as follow:

X Y z F0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 01 1 0 11 1 1 1

Task 2:1. The logic gates are drawn as in Attachment 2.2. A truth table is constructed as follow:

A B C Y0 0 0 10 0 1 10 1 0 10 1 1 11 0 0 01 0 1 11 1 0 01 1 1 0

3. The results get from the truth table is simplified by using K-Map as follow:

C CA B 1 1A B 1 1

AB 0 0A B 0 1

4. From the looping of the K-Map, we get the simplified expression as follow:

y=A+BC

5. A simplified logic gates circuit is drawn as in Attachment 3.

Page 12: E&E Assignment

Task 3:

1. A group of decimal number is converted into binary number by using scientific calculator:

Decimal Number Binary Number1 16 1108 10009 100113 110114 111015 1111

2. A truth table is constructed according to the decimal number we wanted for the output.

Prepositions A B C D Z[0] 0 0 0 0 0[1] 0 0 0 1 1[2] 0 0 1 0 0[3] 0 0 1 1 0[4] 0 1 0 0 0[5] 0 1 0 1 0[6] 0 1 1 0 1[7] 0 1 1 1 0[8] 1 0 0 0 1[9] 1 0 0 1 1[10] 1 0 1 0 0[11] 1 0 1 1 0[12] 1 1 0 0 0[13] 1 1 0 1 1[14] 1 1 1 0 1[15] 1 1 1 1 1

3. A Boolean expression is get from above truth table.

Z=ABC D+A BC D+A BC D+A BC D+ABC D+ABC D+ABCD

Page 13: E&E Assignment

4. We used K-Map to reduce the complicacy of the Boolean equation above:

C D CD CD C D

A B 0 1 0 0A B 0 0 0 1

AB 0 1 1 1A B 1 1 0 0

5. From the looping of the K-Map, We get the simplified expression as follow:

Z=ABD+A BC+BC D+BC D

6. A simple logic gates circuit is drawn as in Attachment 4 followed the simplified expression as above.

Page 14: E&E Assignment

Discussion

The results show that the arithmetic logic unit behaved as expected. There was frequent careless mistakes when simplify the expression in K-Map due to complicacy, but this can be avoided if do it with care. Beside this, there is some logical errors while getting the simplified expression from the K-Map while looping, this error can be avoided if never loop the same data twice. Nevertheless, mistaken wires connection while using Multisim but we avoid this mistakes by testing more than one times in Multisim.

Conclusion

Overall, the investigation was successful in meeting the objectives of designing an Arithmetic Logic circuit in order to demonstrate the methods of using Boolean algebra, Truth table, K-Map, and Multisim. This assignment also gave us the approach on how to manipulate various functions by using Arithmetic Logic Gate and we might able to invent in future by using these applications. Besides this, this assignment meet the most important objective where strengthen our knowledge related to digital system that in our syllabus. Practical can carry more understandable data compare with only scan through the theories through books. I hope that this assignment would help us in doing good in our final examination and apply every inch of knowledge in this assignment after step out from university.

Page 15: E&E Assignment

References

Zahariah Binti Manap, Modul 9, Foundamental of Electric And Electronic, Penerbit Universiti,Utem, 2009.

Lecture Note on BENG 1113 CHAP5Digital System.

Extra Slide Note on K-Map and Multisim.

http://en.wikibooks.org/wiki/Digital_Circuits/ Logic_

Operations

http://www.facstaff.bucknell.edd/mastascu/elessonhtml/

logic/logical.html